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CY62148VNLL-70ZSXI

P1-P3P4-P6P7-P9P10-P11
CY62148VN MoBL
®
Document #: 001-55636 Rev. ** Page 7 of 11
Figure 7. Write Cycle 2: CE Controlled
[8, 13, 14]
Figure 8. Write Cycle 3: WE controlled, OE LOW
[14]
Switching Waveforms (continued)
t
WC
t
AW
t
SA
t
HA
t
HD
t
SD
t
SCE
WE
DATA I/O
ADDRESS
CE
DATA
IN
VALID
DATA I/O
ADDRESS
t
HD
t
SD
t
LZWE
t
SA
t
HA
t
AW
t
WC
CE
WE
t
HZWE
DATA
IN
VALID
NOTE
15
Note
15. During this period, the I/Os are in output state. Do not apply input signals.
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CY62148VN MoBL
®
Document #: 001-55636 Rev. ** Page 8 of 11
Typical DC and AC Characteristics
Truth Table
CE WE OE Inputs/Outputs Mode Power
H X X High-Z Deselect/Power down Standby (I
SB
)
L H L Data Out Read Active (I
CC
)
L L X Data In Write Active (I
CC
)
L H H High-Z Output Disabled Active (I
CC
)
Ordering Information
Speed
(ns) Ordering Code
Package
Name Package Type
Operating
Range
70 CY62148VNLL-70ZSXI 51-85095 32-Pin TSOP II Industrial
CY62148VNLL-70SXI 51-85081 32-Pin (450-mil) Molded SOIC
70
80
60
40
30
20
1.0
1.9
2.8
3.7
SUPPLY VOLTAGE (V)
Access Time vs. Supply Voltage
10
50
T
AA
(ns)
40
45
35
25
20
15
1.0
1.9
2.8
3.7
10
30
I
SB (μA)
Standby Current vs. Supply Voltage
SUPPLY VOLTAGE (V)
1.2
1.4
1.0
0.6
0.4
0.2
1.7 2.2 2.7 3.2 3.7
0.0
0.8
I
CC
Normalized Operating Current
SUPPLY VOLTAGE (V)
vs. Supply Voltage
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CY62148VN MoBL
®
Document #: 001-55636 Rev. ** Page 9 of 11
Package Diagrams
Figure 9. 32-Pin (450-mil) Molded SOIC, 51-85081
0.546[13.868]
0.440[11.176]
0.101[2.565]
0.050[1.270]
0.014[0.355]
0.118[2.997]
0.004[0.102]
0.047[1.193]
0.006[0.152]
0.023[0.584]
0.793[20.142]
0.450[11.430]
0.566[14.376]
0.111[2.819]
0.817[20.751]
BSC.
0.020[0.508]
MIN.
MAX.
0.012[0.304]
0.039[0.990]
0.063[1.600]
SEATING PLANE
116
17 32
0.004[0.102]
DIMENSIONS IN INCHES[MM]
MIN.
MAX.
PACKAGE WEIGHT 1.42gms
PART #
S32.45 STANDARD PKG.
SZ32.45 LEAD FREE PKG.
51-85081 *C
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P1-P3P4-P6P7-P9P10-P11

CY62148VNLL-70ZSXI

Mfr. #:
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Manufacturer:
Cypress Semiconductor
Description:
SRAM
Lifecycle:
New from this manufacturer.
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