I
NTEGRATED
C
IRCUITS
D
IVISION
CPC7591
R06 www.ixysic.com 11
To facilitate hot plug insertion and system power up
state control, the LATCH pin has an integrated weak
pull up resistor to the V
DD
power rail that will hold a
non-driven LATCH pin at a logic high state. This
enables board designers to use the CPC7591 with
FPGAs and other devices that provide high
impedance outputs during power up and logic
configuration. The weak pull up allows a fan out of up
to 32 when the system’s LATCH control driver has a
logic low minimum sink capability of 4mA.
2.2.2 Hot Plug and Power Up Circuit Design
Considerations
There are six possible start up scenarios that can
occur during power up. They are:
1. All inputs defined at power up & LATCH = 0
2. All inputs defined at power up & LATCH = 1
3. All inputs defined at power up & LATCH = Z
4. All inputs not defined at power up & LATCH = 0
5. All inputs not defined at power up & LATCH = 1
6. All inputs not defined at power up & LATCH = Z
Under all of the start up situations listed above the
CPC7591 will hold all of it’s switches in the all-off state
during power up. When V
DD
requirements have been
satisfied the LCAS will complete it’s start up procedure
in one of three conditions.
For start up scenario 1 the CPC7591 will transition
from the all-off state to the state defined by the inputs
when V
DD
is valid.
For start up scenarios 2, 3, 5, and 6 the CPC7591 will
power up in the all-off state and remain there until the
LATCH pin is pulled low. This allows for an indefinite
all-off state for boards inserted into a powered system
but are not configured for service or boards that need
to wait for other devices to be configured first.
Start up scenario 4 will start up with all switches in the
all-off state but upon the acceptance of a valid V
DD
the
LCAS will revert to either the talk state or the ringing
state and there after may randomly change states
based on input pin leakage currents and loading.
Because the LCAS state after power up can not be
predicted with this start up condition it should never be
utilized.
On designs that do not wish to individually control the
LATCH pins of multiple-port cards it is possible to bus
many (or all) of the LATCH pins together to create a
single board level input enable control.
2.3 Switch Logic
2.3.1 Start-up
The CPC7591 uses smart logic to monitor the V
DD
supply. Any time the V
DD
is below an internally set
threshold, the smart logic places the control logic to
the all-off state. An internal pullup on the LATCH pin
locks the CPC7591 in the all-off state following
start-up until the LATCH pin is pulled down to a logic
low. Prior to the assertion of a logic low at the LATCH
pin, the switch control inputs must be properly
conditioned.
2.3.2 Switch Timing
The CPC7591 provides, when switching from the
ringing state to the talk state, the ability to control the
release timing of the ringing switches SW3 and SW4
relative to the state of the break switches SW1 and
SW2 using simple TTL logic-level inputs. The two
available techniques are referred to as
make-before-break and break-before-make operation.
When the switch contacts of SW1 and SW2 are closed
(made) before the ringing switch contacts of SW3 and
SW4 are opened (broken), this is referred to as
make-before-break operation. Break-before-make
operation occurs when the ringing contacts of SW3
and SW4 are opened (broken) before the switch
contacts of SW1 and SW2 are closed (made). With
the CPC7591, make-before-break and
break-before-make operations can easily be
accomplished by applying the proper sequence of TTL
logic-level inputs to the device.
2.3.3 Make-Before-Break Operation
To use make-before-break operation, change the logic
inputs from the ringing state directly to the talk state.
Application of the talk state opens the ringing return
switch, SW3, as the break switches SW1 and SW2
close. The ringing switch, SW4, remains closed until
the next zero-crossing of the ringing current. While in
the make-before-break state, ringing potentials in
excess of the CPC7591 protection circuitry thresholds
will be diverted away from the SLIC. This operational
sequence is shown below in the “Make-Before-Break
Ringing to Talk Transition Logic Sequence” on page 12.
