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CPC7591BB

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
I
NTEGRATED
C
IRCUITS
D
IVISION
CPC7591
R06 www.ixysic.com 7
1.6.3 Ringing Switch, SW4
Parameter Test Conditions Symbol Minimum Typical Maximum Unit
Off-State
Leakage Current
V
SW4
(differential) = R
LINE
to R
RINGING
All-Off state.
+25 C
V
SW
(differential) = -255 V to +210 V
V
SW
(differential) = +255 V to -210 V
I
SW
-
0.05
1 A
+85 C
V
SW
(differential) = -270 V to +210 V
V
SW
(differential) = +270 V to -210 V
0.1
-40 C
V
SW
(differential) = -245 V to +210 V
V
SW
(differential) = +245 V to -210 V
0.05
On Resistance
I
SW
(on) = ±70 mA, ±80 mA R
ON
-1015
On Voltage
I
SW
(on) = ± 1 mA V
ON
-1.53 V
On-State
Leakage Current
Inputs set for ringing -Measure ringing
generator current to ground.
I
RINGING
- 0.1 0.25 mA
Steady-State Current* Inputs set for ringing mode.
I
SW
--150mA
Surge Current*
Ringing switches on, all other switches
off. Apply ±1 kV 10x1000 s pulse with
appropriate protection in place.
I
SW
--2A
Release Current SW4 transition from on to off.
I
RINGING
-300- A
Logic input to switch
output isolation
Logic inputs = GND
+25 C, V
SW
(R
RINGING
, R
LINE
) = ±320V
I
SW
-
0.1
1 A
+85 C, V
SW
(R
RINGING
, R
LINE
) = ±330V
0.3
-40 CV
SW
(R
RINGING
, R
LINE
) = ±310 V
0.1
dV/dt sensitivity
100VPP Square Wave, 100Hz
(Not production tested - limits are
guaranteed by design and quality
control sampling audits.)
--500-V/s
*Secondary protection and current limiting must prevent exceeding this parameter.
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NTEGRATED
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IRCUITS
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IVISION
8 www.ixysic.com R06
CPC7591
1.7 Digital I/O Electrical Specifications
1.8 Voltage and Power Specifications
Parameter Test Conditions Symbol Minimum Typical Maximum Unit
Input Characteristics
Input voltage, Logic low Input voltage falling
V
IL
0.8 1.1
V
Input voltage, Logic high Input voltage rising
V
IH
1.7 2.0
Input leakage current,
IN
RINGING
, Logic high
V
DD
= 5.5 V, V
BAT
= -75 V, V
HI
=2.4V I
IH
-0.11A
Input leakage current,
IN
RINGING
, Logic low
V
DD
= 5.5 V, V
BAT
= -75 V, V
IL
= 0.4V I
IL
-0.11A
Input leakage current,
LATCH Logic high
V
DD
= 4.5 V, V
BAT
= -75 V, V
IH
= 2.4V I
IH
719-A
LATCH Pull-up
Minimum Load
V
DD
= 4.5 V, V
BAT
= -75 V, I
IN
= -10 A
Latch input transitions to logic high.
Logic = High True
Input leakage current,
LATCH Logic low
V
DD
= 5.5 V, V
BAT
= -75 V, V
IL
= 0.4V I
IL
- 46 125 A
Input leakage current,
T
SD
Logic high
V
DD
= 5.5 V, V
BAT
= -75 V, V
IH
= 2.4 I
IH
10 16 30 A
Input leakage current,
T
SD
Logic low
V
DD
= 5.5 V, V
BAT
= -75 V, V
IL
= 0.4V I
IL
10 16 30 A
Output Characteristics
Output voltage,
T
SD
Logic high
V
DD
= 5.5 V, V
BAT
= -75 V, I
TSD
= AV
TSD_off
2.4
V
DD
-V
Output voltage,
T
SD
Logic low
V
DD
= 5.5 V, V
BAT
= -75 V, I
TSD
= mA V
TSD_on
-00.4V
Parameter Test Conditions Symbol Minimum Typical Maximum Unit
Voltage Requirements
V
DD
-
V
DD
4.5 5.0 5.5 V
V
BAT
1
-
V
BAT
-19 -48 -72 V
1
V
BAT
is used only for internal protection circuitry. If V
BAT
goes more positive than -10 V, the device will enter the all-off state, and will remain in the all-off state until
the battery goes more negative than -15 V
Power Specifications
Power consumption
V
DD
= 5 V, V
BAT
= -48 V,
Measure I
DD
and I
BAT
,
Talk and All-Off states P - 5.5 10.5 mW
Ringing state P - 6.5 10.5 mW
V
DD
current
V
DD
= 5 V, V
BAT
= -48 V
Talk and All-Off states
I
DD
-1.12.0mA
Ringing state
I
DD
-1.32.0mA
V
BAT
current V
DD
= 5V, V
BAT
= -48 V, All states I
BAT
-0.110A
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NTEGRATED
C
IRCUITS
D
IVISION
CPC7591
R06 www.ixysic.com 9
1.9 Protection Circuitry Electrical Specifications
1.10 Truth Table
Parameter Conditions Symbol Minimum Typical Maximum Unit
Protection Diode Bridge
Forward Voltage drop,
continuous current
(50/60 Hz)
Apply ± dc current limit of break
switches
V
F
-2.13.0
V
Forward Voltage drop,
surge current
Apply ± dynamic current limit of break
switches
V
F
-5-
Protection SCR (CPC7591xA)
Surge current - - - - * A
Trigger current:
Current into V
BAT
pin.
SCR activates, +25 C
I
TRIG
-
65
-mA
SCR activates, +85 C45
Hold current: Current
through protection SCR
SCR remains active, +25 C
I
HOLD
- 195
-mA
SCR remains active, +85 C 110 130
Gate trigger voltage
I
GATE
= I
TRIGGER
§
V
TBAT
or
V
RBAT
V
BAT
-4
-
V
BAT
-2
V
Reverse leakage current
V
BAT
= -48 V I
VBAT
-0.21.0A
On-state voltage
0.5 A, t = 0.5 sV
TBAT
or
V
RBAT
-
-3
-V
2.0 A, t = 0.5 s-5
Temperature Shutdown Specifications
Shutdown activation
temperature
Not production tested - limits are
guaranteed by design and Quality
Control sampling audits.
T
TSD_on
110 125 150 C
Shutdown circuit
hysteresis
T
TSD_off
10 - 25 C
*Passes GR1089 and ITU-T K.20 with appropriate secondary protection in place.
§
V
BAT
must be capable of sourcing I
TRIGGER
for the internal SCR to activate.
State
IN
RINGING
Latch
T
SD
Break
Switches
Ringing Switches
Ta l k 0
0
Z
1
On Off
Ringing 1 Off
On
Latched X 1 Unchanged
All-Off X X 0 Off Off
1
Z = High Impedance. Because T
SD
has an internal pull up at this pin, it should be controlled with an open-collector or open-drain type device.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

CPC7591BB

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