MJE18006G
http://onsemi.com
5
h
FE
, FORCED GAIN
T
C
, CROSSOVER TIME (ns)
3
180
h
FE
, FORCED GAIN
Figure 13. Inductive Fall Time
t
fi
, FALL TIME (ns)
Figure 14. Inductive Crossover Time
60
515
350
200
50
4 67891011121314
80
140
35 154 6 7 8 91011121314
300
100
I
C
= 3 A
I
C
= 1.3 A
T
J
= 25°C
T
J
= 125°C
100
120
I
B(off)
= I
C
/2
V
CC
= 15 V
V
Z
= 300 V
L
C
= 200 mH
150
250
160
T
J
= 25°C
T
J
= 125°C
I
C
= 3 A
I
B(off)
= I
C
/2
V
CC
= 15 V
V
Z
= 300 V
L
C
= 200 mH
I
C
= 1.3 A
TYPICAL SWITCHING CHARACTERISTICS
(I
B2
= I
C
/2 for all switching)
I
C
, COLLECTOR CURRENT (AMPS)
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
I
C
, COLLECTOR CURRENT (AMPS)
Figure 15. Forward Bias Safe Operating Area
Figure 16. Reverse Bias Switching Safe Operating Area
Figure 17. Forward Bias Power Derating
100
10
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
7
6
0
0 200
1,0
0,8
0,2
0,0
20
T
C
, CASE TEMPERATURE (°C)
80 140 160
1
0.01
3
600 1000
100 1000
DC (MJE18006)
5 ms
POWER DERATING FACTOR
0,6
0,4
10
0.1
EXTENDED
SOA
1 ms
10 ms 1 ms
400
2
1
4
5
40 60 100 120
SECOND BREAKDOWN
DERATING
800
T
C
≤ 125°C
I
C
/I
B
≥ 4
L
C
= 500 mH
-5 V
-1, 5 V
V
BE(off)
= 0 V
GUARANTEED SAFE OPERATING AREA INFORMATION
THERMAL DERATING
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate. The data of Figure 15 is
based on T
C
= 25°C; T
J(pk)
is variable depending on power
level. Second breakdown pulse limits are valid for duty
cycles to 10% but must be derated when T
C
≥ 25°C. Second
breakdown limitations do not derate the same as thermal
limitations. Allowable current at the voltages shown in
Figure 15 may be found at any case temperature by using the
appropriate curve on Figure 17. T
J(pk)
may be calculated
from the data in Figure 20. At any case temperatures, thermal
limitations will reduce the power that can be handled to
values less than the limitations imposed by second
breakdown. For inductive loads, high voltage and current
must be sustained simultaneously during turn−off with the
base−to−emitter junction reverse−biased. The safe level is
specified as a reverse−biased safe operating area (Figure 16).
This rating is verified under clamped conditions so that the
device is never subjected to an avalanche mode.
There are two limitations on the power handling ability
of a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
C
− V
CE
limits of the transistor that must be observed for reliable
