10
LT3781
3781f
APPLICATIO S I FOR ATIO
WUUU
Overview
The LT3781 is a high voltage, high current synchronous
regulator controller, optimized for use with dual transistor
forward topologies. The IC uses a constant frequency,
current mode architecture, with internal logic that pre-
vents operation over 50% duty cycle. A unique synchroni-
zation scheme allows the system clock to be synchronized
up to an operational frequency of 350kHz, along with
phase control for easy integration of multicontroller sys-
tems. A local precision 5V supply rail is available for
external support circuitry and can be loaded up to 20mA.
Internal fault detection circuitry disables switching when
a variety of system faults are detected such as: input
supply overvoltage or undervoltage faults, excessive sys-
tem temperature, and local supply overcurrent conditions.
The LT3781 has a current-limit soft-start feature, which
gradually increases the current drive capability of a con-
verter system to yield a smooth start-up with minimal
overshoot. The soft-start circuitry is also used for smooth
recoveries from system fault conditions.
External FET switches are employed for the switch ele-
ments, and hearty switch drivers allow implementation of
high current designs. An adaptive blanking scheme built
into the LT3781 allows for correct current-sense blanking
regardless of switch size. The LT3781 employs a voltage
output error amplifier, providing superior integrator lin-
earity and allowing easy high bandwidth integration of
optocoupler feedback for fully isolated solutions.
Theory of Operation (See Block Diagram)
The LT3781 senses the output voltage of its associated
converter via the V
FB
pin. The difference between the
voltage on this pin and an internal 1.25V reference is
amplified to generate an error voltage on the V
C
pin, which
is used as a threshold for the current sense comparator.
The current sense comparator gets its information from
the SENSE pin, which monitors the voltage drop across an
external current sense resistor. When the detected switch
current increases to the level corresponding to the error
voltage on the V
C
pin, the switches are disabled until the
next switch cycle.
During normal operation, the LT3781 internal oscillator
runs at twice the switching frequency. The oscillator
output toggles a T flip-flop, generating a 50% duty cycle
pulse that is used internally as the system clock for the IC.
When the output of this flip-flop transitions high, the
primary switches are enabled. The primary side switches
stay enabled until the transformer primary current, sensed
via the SENSE pin connected to a ground-referenced
resistor in series with the bottom side switch FET, is
sufficient to trip the current sense comparator and, in turn,
reset the RS latch. When the RS latch resets, the primary
switches are disabled and the synchronous switch is
enabled. The adaptive blanking circuit senses the bottom
side gate voltage and prevents current sensing until the
FET is fully enabled, preventing false triggering due to a
turn-on transition glitch. If the current comparator thresh-
old is not obtained when the flip-flop output transitions
low, the RS latch is bypassed and the primary switches are
disabled until the next flip-flop output transition, forcing a
maximum switch duty cycle less than 50%.
System Fault Detection-The General Fault Condition
(GFC)
The LT3781 contains circuitry for detecting internal and
system faults. Detection of a fault triggers a “general fault
condition”, or GFC. When a GFC is detected, the LT3781
disables switching and discharges the soft-start capaci-
tor. When the GFC subsides, the LT3781 initiates a start-
up cycle via the soft-start circuitry to assure a graceful
recovery. Recovery from a GFC is gated by the soft-start
capacitor discharge. The capacitor must be discharged to
a threshold of 225mV before the GFC can be concluded. As
the zero output current threshold of the SS pin is typically
a transistor V
BE
, or 0.7V, latching the GFC until a 225mV
threshold is achieved assures a zero output current state
in the event of a short-duration fault. A GFC is also
triggered during system state change event, such as
entering shutdown mode, to prevent any mode transition
abnormalities.
