AD8315 Data Sheet
Rev. D | Page 16 of 22
Where the modulation is complex, as in CDMA, the calibration
of the power response must be adjusted; the intercept remains
stable for any given arbitrary waveform. When a true power
(waveform independent) response is needed, a mean-responding
detector, such as the AD8361, must be considered.
The logarithmic slope, V
SLP
in Equation 1, which is the amount
by which the setpoint voltage must be changed for each decibel of
input change (voltage or power), is, in principle, independent of
waveform or termination impedance. In practice, it usually falls
off somewhat at higher frequencies, due to the declining gain of
the amplifier stages and other effects in the detector cells (see
Figure 16).
BASIC CONNECTIONS
Figure 37 shows the basic connections for operating the
AD8315, and Figure 38 shows a block diagram of a typical
application. The AD8315 is typically used in the RF power
control loop of a mobile handset.
A supply voltage of 2.7 V to 5.5 V is required for the AD8315.
The supply to the VPOS pin must be decoupled with a low
inductance 0.1 µF surface-mount ceramic capacitor, close to the
device. The AD8315 has an internal input coupling capacitor.
This negates the need for external ac coupling. This capacitor,
along with the low frequency input impedance of the device of
approximately 2.8 kΩ, sets the minimum usable input frequency to
around 0.016 GHz. A broadband 50 Ω input match is achieved
in this example by connecting a 52.3 Ω resistor between RFIN
and ground. A plot of input impedance vs. frequency is shown
in Figure 12. Other coupling methods are also possible (see
Input Coupling Options section).
NC = NO CONNECT
RFIN
ENBL
VSET
VPOS
VAPC
NC
COMMFLTR
AD8315
1
2
3
54
6
7
8
RFIN
(2.7V TO 5.5V)
C1
0.1µF
R1
52.3Ω
C
FLT
V
SET
+V
S
+V
S
+V
APC
01520-036
Figure 37. Basic Connections
RFIN
VSET
AD8315
VAPC
FLTR
DAC
RFIN
ATTENUATOR
52.3Ω
POWER
AMP
DIRECTIONAL
COUPLER
GAIN
CONTROL
VOLTAGE
C
FLT
01520-037
Figure 38. Typical Application
In a power control loop, the AD8315 provides both the detector
and controller functions. A sample of the power amplifier (PA)
output power is coupled to the RF input of the AD8315, usually
via a directional coupler. In dual-mode applications, where
there are two PAs and two directional couplers, the outputs of
the directional couplers can be passively combined (both PAs
will never be turned on simultaneously) before being applied to
the AD8315.
A setpoint voltage is applied to VSET from the controlling
source (generally, this is a DAC). Any imbalance between the
RF input level and the level corresponding to the setpoint voltage is
corrected by the AD8315 VAPC output that drives the gain control
terminal of the PA. This restores a balance between the actual
power level sensed at the input of the AD8315 and the value
determined by the setpoint. This assumes that the gain control
sense of the variable gain element is positive, that is, an increasing
voltage from VAPC tends to increase gain.
V
APC
can swing from 250 mV to within 100 mV of the supply
rail and can source up to 6 mA. If the control input of the PA
must source current, a suitable load resistor can be connected
between VAPC and COMM. The output swing and current
sourcing capability of VAPC is shown in Figure 22.
RANGE ON VSET AND RFIN
The relationship between the RF input level and the setpoint
voltage follows from the nominal transfer function of the device
(see Figure 5, Figure 6, Figure 8, and Figure 9). At 0.9 GHz, for
example, a voltage of 1 V on VSET indicates a demand for −30 dBV
(−17 dBm, re 50 Ω) at RFIN. The corresponding power level at the
output of the power amplifier is greater than this amount due to
the attenuation through the directional coupler.
For setpoint voltages of less than approximately 250 mV, V
APC
remains unconditionally at the minimum level of approximately
250 mV. This feature can prevent any spurious emissions during
power-up and power-down phases.
Above 250 mV, V
SET
has a linear control range up to 1.4 V,
corresponding to a dynamic range of 50 dB. This results in a
slope of 23 mV/dB or approximately 43.5 dB/V.
TRANSIENT RESPONSE
The time domain response of power amplifier control loops,
using any kind of controller, is only partially determined by the
choice of filter, which, in the case of the AD8315, has a true
integrator form 1/sT, as shown in Equation 7, with a time constant
given by Equation 8. The large signal step response is also strongly
dependent on the form of the gain-control law. Nevertheless, some
simple rules can be applied. When the filter capacitor C
FLT
is very
large, it dominates the time domain response, but the incremental
bandwidth of this loop still varies as V
APC
traverses the nonlinear
gain-control function of the PA, as shown in Figure 36.
