N57L5125TBD10TG

N57L5125
www.onsemi.com
4
TYPICAL OPERATING CHARACTERISTICS
(T
A
= 25°C, unless otherwise noted.)
Figure 2. W-to-GND Resistance vs. Tap
Position
Figure 3. Supply Current vs. Temperature
TAP POSITION TEMPERATURE (°C)
2925211713951
0
20
40
60
80
100
120
150100500−50
0
0.05
0.15
0.20
0.25
0.30
0.40
0.45
Figure 4. Tap-to-Tap Switching Transient
RESISTANCE (kW)
CURRENT (mA)
31272319151173
100 k
50 k
10 k
0.10
0.35
V
DD
= 2.7 V
V
DD
= 5.5 V
200 ns/div
U/D
2 V/div
WIPER
OUTPUT
100 mV/div
N57L5125
www.onsemi.com
5
FUNCTIONAL DESCRIPTION
The N57L5125 consists of a fixed resistor and a wiper
contact with 32−tap points that are digitally controlled
through a 2-wire up/down serial interface. Three end-to-end
resistance values are available: 10 kW, 50 kW and 100 kW.
The N57L5125 is designed to operate as a potentiometer.
In this configuration, the low terminal of the resistor array
is connected to ground (pin 2).
Digital Interface Operation
The devices have two modes of operation when the serial
interface is active: increment and decrement mode. The
serial interface is only active when CS
is low.
The CS
and U/D inputs control the position of the wiper
along the resistor array. When CS
transitions from high to
low, the part will go into increment mode if U/D
input is
high, and into decrement mode when U/D
input is low. Once
the mode is set, the device will remain in that mode until CS
goes high again. A low-to-high transition at the U/D pin will
increment or decrement the wiper position depending on the
current mode (Figures 5 and 6).
When the CS
input transitions to high (serial interface
inactive), the value of the counter is stored and the wiper
position is maintained.
Note that when the wiper reaches the maximum (or
minimum) tap position, the wiper will not wrap around to the
minimum (or maximum) position.
Power-On Reset
All parts in this family feature power-on reset (POR)
circuitry that sets the wiper position to midscale at
power-up. By default, the chip is in the increment mode.
Figure 5. Serial Interface Timing Diagram, Increment Mode
W
U/D
CS
t
CU
t
CI
t
IL
t
IH
t
SETTLE
t
SETTLE
t
IC
Note: “W” is not a digital signal. It represents wiper transitions.
Figure 6. Serial Interface Timing Diagram, Decrement Mode
W
Note: “W” is not a digital signal. It represents wiper transitions.
t
SETTLE
t
CI
t
CU
U/D
CS
t
IH
t
IL
t
SETTLE
t
IC
N57L5125
www.onsemi.com
6
APPLICATIONS INFORMATION
The devices are intended for circuits requiring digitally
controlled adjustable resistance, such as LCD contrast
control, where voltage biasing adjusts the display contrast.
Alternative Positive LCD Bias Control
An op amp can be used to provide buffering and gain on
the output of the N57L5125. This can be done by connecting
the wiper output to the positive input of a noninverting op
amp as shown in Figure 7.
Adjustable Gain
Figure 8 shows how to use a potentiometer to digitally
adjust the gain of a noninverting op amp configuration, by
connecting the devices in series with a resistor to ground.
The devices have a low 5 ppm/°C ratiometric tempco that
allows for a very stable adjustable gain configuration over
temperature.
30 V
W
H
+5 V
N57L5125
H
W
N57L5125
Figure 7. Positive LCD Bias Control
Figure 8. Adjustable Gain Circuit
V
OUT
V
IN
V
CC
V
OUT

N57L5125TBD10TG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Digital Potentiometer ICs 32-TAP DGTL W/2-WIRE POTENTIOMETER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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