5
Vdd = +2.85V
RF_OUT
Vs d = +2 .85V
RF_IN
Toko 0402
Toko 0402
Toko 0402
Toko 0402
BIAS
L
L3
R=
L=6.8 nH
C
C1
C=6.8 pF
L
L2
L=12 nH
L
L1
L=5.6 nH
R
R1
kOhm
C
C2
C=6.8 pF
C
C
C3
C=0.1 uF
PRL
PRL1
L4 =33 nH
R2 =12 Ohm
C
Am p lifie r2
AMP 1
2
4
6
5
GND
Vdd = +2.85V
RF_OUT
Vs d = +2 .85V
RF_IN
Toko 0402
Toko 0402
Toko 0402
Toko 0402
BIAS
L
L3
R=
L=6.8 nH
C
C1
C=6.8 pF
L
L2
L=12 nH
L
L1
L=5.6 nH
R
R1
R=22
C
C2
C=6.8 pF
C
C
C3
C=0.1 uF
PRL
PRL1
L4 =33 nH
R2 =12 Ohm
C
Am p lifie r2
AMP 1
2
4
6
5
GND
Figure 2. Demoboard schematic diagram
Notes
1. L1 and L2 form the input matching network. The LNA module has a built-in coupling and DC-block capacitor at the input and output. Best noise
performance is obtained using high-Q wirewound inductors. This circuit demonstrates that low noise gures are obtainable with standard 0402
chip inductors. Replacing L1, L2 and L3 with high-Q wirewound inductors (eg. Cilcraft 0402CS series) will yield 0.1dB lower NF and 0.2dB higher
Gain.
2. L3 is an output matching inductor.
3. C1 is a RF bypass capacitor.
4. PRL1 is a network that isolates the measurement demoboard from external disturbances. C2 and C3 mitigates the e ect of external noise pickup
on the VSD and VDD lines. These components are not required in actual operation.
5. Bias control is achieved by either varying the VSD voltage without R1 or xing the VSD voltage to VDD and varying R1. Typical value for R1 is
22k Ohm for 5mA total current at VDD=+2.85V.
