LT3009 Series
10
3009fd
TYPICAL PERFORMANCE CHARACTERISTICS
T
A
= 25°C, unless otherwise noted.
Input Ripple Rejection
Load Regulation Output Noise Spectral Density
RMS Output Noise vs Load
Current (10Hz to 100kHz) Transient ResponseTransient Response
–1.0
–0.5
0.5
0
1.0
1.5
2.0
2.5
3.0
TEMPERATURE (°C)
LOAD REGULATION (mV)
3009 G22
–50 –25 0 25 50 75 100 125 150
ΔI
L
= 1μA TO 20mA
V
OUT
= 600mV
V
IN
= 1.6V
0
10
30
20
40
50
60
70
80
TEMPERATURE (°C)
INPUT RIPPLE REJECTION (dB)
3009 G21
–50 –25 0 25 50 75 100 125 150
V
IN
= V
OUT
(NOMINAL) + 1V + 0.5V
P-P
RIPPLE AT f = 120Hz
I
LOAD
=
20mA
I
LOAD
(mA)
0.001
500
600
700
10
3009 G24
400
300
0.01 0.1 1 100
200
100
0
OUTPUT NOISE (μV
RMS
)
600mV
1.8V
1.2V
1.5V
2.5V
3.3V
5V
FREQUENCY (Hz)
0.1
OUTPUT NOISE SPECTRAL DENSITY (μV√Hz)
1
100
10
3009 G23
10 100 1k 10k 100k
5V
3.3V
2.5V
1.8V
1.5V
1.2V
1V
0.6V
500μs/DIV
V
OUT
50mV/DIV
I
OUT
20mA/DIV
3009 G25
I
OUT
= 1mA TO 20mA
V
IN
= 5.5V
V
OUT
= 5V
C
OUT
= 1μF
500μs/DIV
V
OUT
50mV/DIV
I
OUT
20mA/DIV
3009 G26
I
OUT
= 1mA TO 20mA
V
IN
= 5.5V
V
OUT
= 5V
C
OUT
= 4.7μF
LT3009 Series
11
3009fd
PIN FUNCTIONS
SHDN (Pin 1/Pin 5): Shutdown. Pulling the SHDN pin
low puts the LT3009 into a low power state and turns the
output off. If unused, tie the SHDN pin to V
IN
. The LT3009
does not function if the SHDN pin is not connected. The
SHDN pin cannot be driven below GND unless tied to the
IN pin. If the SHDN pin is driven below GND while IN is
powered, the output will turn on. SHDN pin logic cannot
be referenced to a negative rail.
GND (Pins 2, 3, 4/Pin 6): Ground. Connect the bottom
of the resistor divider that sets output voltage directly to
GND for the best regulation.
IN (Pin 5/Pin 4): Input. The IN pin supplies power to the
device. The LT3009 requires a bypass capacitor at IN if
the device is more than six inches away from the main
input fi lter capacitor. In general, the output impedance
of a battery rises with frequency, so it is advisable to
include a bypass capacitor in battery-powered circuits. A
bypass capacitor in the range of 0.1μF to 10μF will suf-
ce. The LT3009 withstands reverse voltages on the IN
pin with respect to ground and the OUT pin. In the case
of a reversed input, which occurs with a battery plugged
in backwards, the LT3009 acts as if a large resistor is in
series with its input. Limited reverse current fl ows into
the LT3009 and no reverse voltage appears at the load.
The device protects both itself and the load.
OUT (Pin 6/Pins 2, 3): Output. This pin supplies power to
the load. Use a minimum output capacitor of 1μF to prevent
oscillations. Large load transient applications require larger
output capacitors to limit peak voltage transients. See the
Applications Information section for more information on
output capacitance and reverse output characteristics.
ADJ (Pin 7/Pin 1): Adjust. This pin is the error amplifi ers
inverting terminal. Its 300pA typical input bias current
ows out of the pin (see curve of ADJ Pin Bias Current vs
Temperature in the Typical Performance Characteristics
section). The ADJ pin voltage is 600mV referenced to GND
and the output voltage range is 600mV to 19.5V. This pin
is not connected in the fi xed output voltage versions.
NC (Pins 7, 8/Pin 1): No Connect. For the adjustable voltage
version, Pin 8 is an NC pin in the SC70 package. For the
xed voltage versions, Pin 7 and Pin 8 are NC pins in the
SC70 package, and Pin 1 is an NC pin in the DFN package.
NC pins are not tied to any internal circuitry. They may be
oated, tied to V
IN
or tied to GND.
Exposed Pad (Pin 7, DFN Package Only): Ground. The
Exposed Pad (backside) of the DFN package is an electri-
cal connection to GND. To ensure optimum performance,
solder Pin 7 to the PCB and tie directly to Pin 6.
(SC70/DFN)
LT3009 Series
12
3009fd
APPLICATIONS INFORMATION
The LT3009 is a low dropout linear regulator with ultra-
low quiescent current and shutdown. Quiescent current is
extremely low at 3μA and drops well below 1μA in shut-
down. The device supplies up to 20mA of output current.
Dropout voltage at 20mA is typically 280mV. The LT3009
incorporates several protection features, making it ideal for
use in battery-powered systems. The device protects itself
against both reverse-input and reverse-output voltages.
In battery backup applications, where a backup battery
holds up the output when the input is pulled to ground,
the LT3009 acts as if a blocking diode is in series with its
output and prevents reverse current fl ow. In applications
where the regulator load returns to a negative supply, the
output can be pulled below ground by as much as 22V
without affecting startup or normal operation.
Adjustable Operation
The LT3009 has an output voltage range of 0.6V to 19.5V.
Figure 1 shows that output voltage is set by the ratio of two
external resistors. The IC regulates the output to maintain
the ADJ pin voltage at 600mV referenced to ground. The
current in R1 equals 600mV/R1 and the current in R2 is
the current in R1 minus the ADJ pin bias current. The
ADJ pin bias current, typically 300pA at 25°C, fl ows out
of the pin. Calculate the output voltage using the formula
in Figure 1. An R1 value of 619k sets the divider current
to 0.97μA. Do not make R1’s value any greater than 619k
to minimize output voltage errors due to the ADJ pin bias
current and to insure stability under minimum load condi-
tions. In shutdown, the output turns off and the divider
current is zero. Curves of ADJ Pin Voltage vs Temperature
and ADJ Pin Bias Current vs Temperature appear in the
Typical Performance Characteristics.
Specifi cations for output voltages greater than 0.6V are
proportional to the ratio of the desired output voltage to
0.6V: V
OUT
/0.6V. For example, load regulation for an output
current change of 100μA to 20mA is –0.7mV typical at
V
OUT
= 0.6V. At V
OUT
= 5V, load regulation is:
5V
0.6V
•(0.7mV)= 5.83mV
Table 1 shows resistor divider values for some com-
mon output voltages with a resistor divider current of
about 1μA.
Figure 1. Adjustable Operation
Table 1. Output Voltage Resistor Divider Values
V
OUT
R1 R2
1V 604k 402k
1.2V 604k 604k
1.5V 590k 887k
1.8V 590k 1.18M
2.5V 590k 1.87M
3V 590k 2.37M
3.3V 619k 2.8M
5V 590k 4.32M
Because the ADJ pin is relatively high impedance (de-
pending on the resistor divider used), stray capacitances
at this pin should be minimized. Special attention should
be given to any stray capacitances that can couple ex-
ternal signals onto the ADJ pin producing undesirable
output transients or ripple.
Extra care should be taken in assembly when using high
valued resistors. Small amounts of board contamination
can lead to signifi cant shifts in output voltage. Appro-
priate post-assembly board cleaning measures should
IN
SHDN
R2
R1
3009 F0
OUT
V
IN
V
OUT
= 600mV* (1 + R2/R1) – (I
ADJ
• R2)
V
ADJ
= 600mV
I
ADJ
= 0.3nA at 25°C
OUTPUT RANGE = 0.6V to 19.5V
ADJ
GND
L
T3009
V
OU
T

LT3009IDC-3.3#TRMPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 20mA, 3uA Iq LDO Micropower Regulator
Lifecycle:
New from this manufacturer.
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