74HC_HCT299_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 July 2008 6 of 24
NXP Semiconductors
74HC299; 74HCT299
8-bit universal shift register; 3-state
6. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW to HIGH CP transition;
X = don’t care.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DSL 18 serial data shift-left input
S1 19 mode select input
V
CC
20 positive supply voltage
Table 2. Pin description
…continued
Symbol Pin Description
Table 3. Function table
[1]
Input Response
MR S1 S0 CP
L X X X asynchronous reset; Q0 to Q7 = LOW
HHH↑ parallel load; I/On → Qn
HLH↑ shift right; DSR → Q0, Q0 → Q1, etc.
HHL↑ shift left; DSL → Q7, Q7 → Q6, etc.
H L L X hold
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage −0.5 +7 V
I
IK
input clamping current V
I
< −0.5 V or V
I
>V
CC
+ 0.5 V
[1]
- ±20 mA
I
OK
output clamping current V
O
< −0.5 V or V
O
>V
CC
+ 0.5 V
[1]
- ±20 mA
I
O
output current −0.5 V < V
O
< V
CC
+ 0.5 V
standard outputs - ±25 mA
bus driver outputs - ±35 mA
I
CC
supply current
standard outputs - 50 mA
bus driver outputs - 70 mA
I
GND
ground current
standard outputs −50 - mA
bus driver outputs −70 - mA
T
stg
storage temperature −65 +150 °C
P
tot
total power dissipation T
amb
= −40 °C to +125 °C
DIP20 package
[2]
- 750 mW
SO20 package
[3]
- 500 mW
(T)SSOP20 package
[4]
- 500 mW
