Dual 8-/10-/12-/14-/16-Bit
250 MSPS Digital-to-Analog Converters
Data Sheet
AD9741/AD9743/AD9745/AD9746/AD9747
Rev. A Document Feedback
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FEATURES
High dynamic range, dual DACs
Low noise and intermodulation distortion
Single carrier WCDMA ACLR = 80 dBc at 61.44 MHz IF
Innovative switching output stage permits useable outputs
beyond Nyquist frequency
LVCMOS inputs with dual-port or optional interleaved
single-port operation
Differential analog current outputs are programmable from
8.6 mA to 31.7 mA full scale
Auxiliary 10-bit current DACs with source/sink capability for
external offset nulling
Internal 1.2 V precision reference voltage source
Operates from 1.8 V and 3.3 V supplies
315 mW power dissipation
Small footprint, Pb-free, 72-pin LFCSP
APPLICATIONS
Wireless infrastructure:
WCDMA, CDMA2000, TD-SCDMA, WiMAX
Wideband communications:
LMDS/MMDS, point-to-point
Instrumentation:
RF signal generators, arbitrary waveform generators
GENERAL DESCRIPTION
The AD9741/AD9743/AD9745/AD9746/AD9747 are pin-
compatible, high dynamic range, dual digital-to-analog
converters (DACs) with 8-/10-/12-/ 14-/16-bit resolutions
and sample rates of up to 250 MSPS. The devices include
specific features for direct conversion transmit applications,
including gain and offset compensation, and they interface
seamlessly with analog quadrature modulators, such as the
ADL5370.
A proprietary, dynamic output architecture permits synthesis
of analog outputs even above Nyquist by shifting energy away
from the fundamental and into the image frequency.
Full programmability is provided through a serial peripheral
interface (SPI) port. In addition, some pin-programmable
features are offered for those applications without a controller.
PRODUCT HIGHLIGHTS
1. Low noise and intermodulation distortion (IMD) enables
high quality synthesis of wideband signals.
2. Proprietary switching output for enhanced dynamic
performance.
3. Programmable current outputs and dual auxiliary DACs
provide flexibility and system enhancements.
FUNCTIONAL BLOCK DIAGRAM
16-BIT
DAC1
16-BIT
DAC2
INTERFACE LOGIC
GAIN
DAC
GAIN
DAC
OFFSET
DAC
OFFSET
DAC
INTERNAL
REFERENCE
AND
BIAS
REFIO
FSADJ
SERIAL
PERIPHERAL
INTERFACE
SDO
SDIO
SCLK
CSB
10
CMOS
INTERFACE
CLKP
CLKN
PID<15:0>
P2D<15:0>
IOUT1P
IOUT1N
IOUT2P
IOUT2N
AUX1P
AUX1N
AUX2P
AUX2N
06569-001
Figure 1.
AD9741/AD9743/AD9745/AD9746/AD9747 Data Sheet
Rev. A | Page 2 of 28
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
DC Specifications ......................................................................... 3
AC Specifications .......................................................................... 5
Digital and Timing Specifications .............................................. 7
Absolute Maximum Ratings ............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution .................................................................................. 8
Pin Configurations and Function Descriptions ........................... 9
Typical Performance Characteristics ........................................... 14
Terminology .................................................................................... 17
Theory of Operation ...................................................................... 18
Serial Peripheral Interface ......................................................... 18
General Operation of the Serial Interface ............................... 18
Instruction Byte .......................................................................... 18
MSB/LSB Transfers .................................................................... 19
Serial Interface Port Pin Descriptions ..................................... 19
SPI Register Map ............................................................................ 20
SPI Register Descriptions .............................................................. 21
Digital Inputs and Outputs ........................................................... 22
Input Data Timing ..................................................................... 22
Dual-Port Mode Timing ........................................................... 22
Single-Port Mode Timing ......................................................... 22
SPI Port, Reset, and Pin Mode .................................................. 22
Driving the DAC Clock Input .................................................. 23
Full-Scale Current Generation ................................................. 23
DAC Transfer Function ............................................................. 24
Analog Modes of Operation ..................................................... 24
Auxiliary DACS .......................................................................... 25
Power Dissipation....................................................................... 25
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 27
REVISION HISTORY
1/14—Rev. 0 to Rev. A
Changes to Table 15 ........................................................................ 21
Updated Outline Dimensions ....................................................... 27
Changes to Ordering Guide .......................................................... 27
5/07—Revision 0: Initial Version
Data Sheet AD9741/AD9743/AD9745/AD9746/AD9747
Rev. A | Page 3 of 28
SPECIFICATIONS
DC SPECIFICATIONS
T
MIN
to T
MAX
, AVDD33 = 3.3 V, DVDD33 = 3.3 V, DVDD18 = 1.8 V, CVDD18 = 1.8 V, I
FS
= 20 mA, full-scale digital input, maximum
sample rate, unless otherwise noted.
Table 1. AD9741, AD9743, and AD9745
Parameter
AD9741 AD9743 AD9745
Unit Min Typ Max Min Typ Max Min Typ Max
RESOLUTION
8
10
12
Bits
ACCURACY
Differential Nonlinearity (DNL) ±0.03 ±0.05 ±0.13 LSB
Integral Nonlinearity (INL)
±0.05
±0.10
±0.25
LSB
MAIN DAC OUTPUTS
Offset Error ±0.001 ±0.001 ±0.001 %FSR
Offset Error Temperature Coefficient
1.0
1.0
1.0
ppm/°C
Gain Error ±2.0 ±2.0 ±2.0 %FSR
Gain Error Temperature Coefficient 100 100 100 ppm/°C
Gain Matching (DAC1 to DAC2) ±1.0 ±1.0 ±1.0 %FSR
Full-Scale Output Current 8.6 31.7 8.6 31.7 8.6 31.7 mA
Output Compliance Voltage
−1.0
−1.0
−1.0
V
Output Resistance 10 10 10
AUXILIARY DAC OUTPUTS
Resolution
10
10
10
Bits
Full-Scale Output Current −2.0 +2.0 −2.0 +2.0 −2.0 +2.0 mA
Output Compliance Voltage RangeSink Current 0.8 1.6 0.8 1.6 0.8 1.6 V
Output Compliance Voltage RangeSource Current 0 1.6 0 1.6 0 1.6 V
Output Resistance 1 1 1
Monotonicity 10 10 10 Bits
REFERENCE INPUT/OUTPUT
Output Voltage 1.2 1.2 1.2 V
Output Voltage Temperature Coefficient 10 10 10 ppm/°C
External Input Voltage Range 1.15 1.3 1.15 1.3 1.15 1.3 V
Input or Output Resistance 5 5 5
POWER SUPPLY VOLTAGES
AVDD33, DVDD33 3.13 3.47 3.13 3.47 3.13 3.47 V
CVDD18, DVDD18 1.70 1.90 1.70 1.90 1.70 1.90 V
POWER SUPPLY CURRENTS
I
AVDD33
56 60 56 60 56 60 mA
I
DVDD33
10 14 10 14 11 15 mA
I
CVDD18
18 22 18 22 18 22 mA
I
DVDD18
28 32 29 33 30 34 mA
POWER DISSIPATION
f
DAC
= 250 MSPS, f
OUT
= 20 MHz 300 345 300 345 305 350 mW
DAC Outputs Disabled 115 115 120 mW
Full Device Power-Down 3 3 3 mW
OPERATING TEMPERATURE −40 +85 −40 +85 −40 +85 °C

AD9746BCPZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC Dual 14-Bit 250 MSPS
Lifecycle:
New from this manufacturer.
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