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AD9747BCPZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
Data Sheet AD9741/AD9743/AD9745/AD9746/AD9747
Rev. A | Page 13 of 28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CVDD18
CVSS
CLKP
CLKN
CVSS
CVDD18
DVSS
DVDD18
P1D15
P1D14
P1D13
P1D12
P1D11
P1D10
P1D9
P1D8
17P1D7
18P1D6
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
P1D5
P1D4
P1D3
P1D2
P1D1
P1D0
DCO
NC
DVDD33
DVSS
IQSEL
NC
P2D15
P2D14
P2D13
P2D12
35P2D11
36P2D10
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
FSADJ
RESET
CSB
SCLK
SDIO
SDO
DVSS
DVDD18
P2D0
P2D1
P2D2
P2D3
P2D4
P2D5
P2D6
P2D7
P2D8
P2D9
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
AVDD33
AVDD33
AVSS
IOUT1P
IOUT1N
AVSS
AUX1P
AUX1N
AVSS
AUX2N
AUX2P
AVSS
IOUT2N
IOUT2P
AVSS
AVDD33
AVDD33
REFIO
NC = NO CONNECT
06569-002
PIN 1
INDICATOR
AD9747
(TOP VIEW)
Figure 6. AD9747 Pin Configuration
Table 12. AD9747 Pin Function Descriptions
Pin No. Mnemonic Description
1, 6 CVDD18 Clock Supply Voltage (1.8 V).
2, 5 CVSS Clock Supply Common (0 V).
3
CLKP
Differential DAC Clock Input.
4 CLKN Complementary Differential DAC Clock Input.
7, 28, 48 DVSS Digital Supply Common (0 V).
8, 47 DVDD18 Digital Core Supply Voltage (1.8 V).
9 to 24 P1D<15:0> Port 1 Data Bit Inputs.
25 DCO Data Clock Output. Use to clock data source.
26, 30
NC
No Connect.
27 DVDD33 Digital I/O Supply Voltage (3.3 V).
29 IQSEL I/Q Framing Signal for Single-Port Mode Operation.
31 to 46 P2D<15:0> Port 2 Data Bit Inputs.
49 SDO Serial Peripheral Interface Data Output.
50 SDIO Serial Peripheral Interface Data Input and Optional Data Output.
51 SCLK Serial Peripheral Interface Clock Input.
52 CSB Serial Peripheral Interface Chip Select Input. Active low.
53 RESET Hardware Reset. Active high.
54 FSADJ Full-Scale Current Output Adjust. Connect a 10 kΩ resistor to AVSS.
55 REFIO Reference Input/Output. Connect a 0.1 μF capacitor to AVSS.
56, 57, 71, 72
AVDD33
Analog Supply Voltage (3.3 V).
58, 61, 64, 67, 70 AVSS Analog Supply Common (0 V).
59 IOUT2P DAC2 Current Output. Sources full-scale current when input data bits are all 1.
60 IOUT2N Complementary DAC2 Current Output. Sources full-scale current when data bits are all 0.
62 AUX2P Auxiliary DAC2 Default Current Output Pin.
63 AUX2N Auxiliary DAC2 Optional Output Pin. Enable through SPI.
65
AUX1N
Auxiliary DAC1 Optional Output Pin. Enable through SPI.
66 AUX1P Auxiliary DAC1 Default Current Output Pin.
68 IOUT1N Complementary DAC1 Current Output. Sources full-scale current when data bits are all 0.
69 IOUT1P DAC1 Current Output. Sources full-scale current when data bits are all 1.
EPAD AVSS
Exposed Thermal Pad. Must be soldered to copper pour on top surface of PCB for mechanical
stability and must be electrically tied to low impedance GND plane for low noise performance.
AD9741/AD9743/AD9745/AD9746/AD9747 Data Sheet
Rev. A | Page 14 of 28
TYPICAL PERFORMANCE CHARACTERISTICS
40
50
60
70
80
90
100
0 20
40 60 80 100 120
250MSPS
125MSPS
06569-007
f
OUT
(MHz)
SFDR (dBc)
Figure 7. AD9747 SFDR vs. f
OUT
, Normal Mode
150
175
200 225
40
50
60
70
80
90
100
125 250
06569-008
f
OUT
(MHz)
SFDR (dBc)
Figure 8. AD9747 SFDR vs. f
OUT
, Mix Mode, 250 MSPS
60
65
70
75
80
85
90
50
100 150 200
0
250
06569-009
f
OUT
(MHz)
ACLR (dBc)
NORMAL MODE
MIX MODE
Figure 9. AD9747 ACLR vs. f
OUT
, Single Carrier WCDMA, 245.76 MSPS
40
50
60
70
80
90
100
0 20
40
60 80
100 120
250MSPS
06569-010
f
OUT
(MHz)
IMD (dBc)
125MSPS
Figure 10. AD9747 IMD vs. f
OUT
, Normal Mode
150
175 200 225
40
50
60
70
80
90
100
125 250
06569-011
f
OUT
(MHz)
IMD (dBc)
Figure 11. AD9747 IMD vs. f
OUT
, Mix Mode, 250 MSPS
–168
–166
–164
–162
–160
–158
–156
–154
–152
50
100 150 2000 250
06569-012
f
OUT
(MHz)
NSD (dBm/Hz)
NORMAL MODE
MIX MODE
Figure 12. AD9747 NSD vs. f
OUT
, Single Carrier WCDMA, 245.76 MSPS
Data Sheet AD9741/AD9743/AD9745/AD9746/AD9747
Rev. A | Page 15 of 28
30mAFS
40
50
60
70
80
90
100
0 20 40 60
80 100
120
06569-036
f
OUT
(MHz)
SFDR (dBc)
10mAFS
20mAFS
Figure 13. AD9747 SFDR vs. Analog Output, 250 MSPS
–3dBFS
40
50
60
70
80
90
100
0 20 40 60 80 100 120
06569-037
f
IN
(MHz)
SFDR (dBc)
–6dBFS
0dBFS
Figure 14. AD9747 SFDR vs. Digital Input, 250 MSPS
60
65
70
75
80
85
90
10 20 30
40 50 60 70 80
90 100 110
RANGE OF POSSIBLE SFDR
PERFORMANCE IS DEPENDENT ON
INPUT DATA TIMING RELATIVE TO
THE DAC CLOCK. SEE INPUT DATA
TIMING SECTION.
06569-038
f
OUT
(MHz)
SFDR (dBc)
Figure 15. AD9747 SFDR vs. f
OUT
Over Input Data Timing
10mAFS
20mAFS
30mAFS
40
50
60
70
80
90
100
0 20 40 60 80
100
120
06569-039
f
OUT
(MHz)
IMD (dBc)
Figure 16. AD9747 IMD vs. Analog Output, 250 MSPS
0dBFS
–3dBFS
40
50
60
70
80
90
100
0 20 40 60 80 100 120
06569-040
f
IN
(MHz)
IMD (dBc)
–6dBFS
Figure 17. AD9747 IMD vs. Digital Input, 250 MSPS
f
OUT
(MHz)
60
65
70
75
80
85
90
20 30
40 50 60 70 80 90 100
11010
06569-041
IMD (dBc)
RANGE OF IMD PERFORMANCE IS
ESSENTIALLY INDEPENDENT OF
INPUT DATA TIMING RELATIVE TO
THE DAC CLOCK. SEE INPUT DATA
TIMING SECTION.
Figure 18. AD9747 IMD vs. f
OUT
Over Input Data Timing
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28

AD9747BCPZ

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Buy AD9747BCPZ
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC Dual 16-Bit 250 MSPS
Lifecycle:
New from this manufacturer.
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