Datasheet
R2A20168NP/SA/SP
Page 7 of 9
R03DS0019EJ0200 Rev.2.00
Jul 03, 2013
Precaution For Use
Analog voltage
output
10µF
+
Ao1
Ao2
GND
Vcc
10µF
+
10µF
+
Ao7
Ao8
Standard Application Circuit
LD
CLK
DI
MCU
Data Timing Chart ( Model )
DI
LD
D/A
output
D2 D9 D10 D11
CLK
D8 D7 D1 D0
MSB LSB
Whether CLK input is “H” or “L”, high
level input of LD signal is recognized.
· There are three terminals (Vcc, V
refU
, V
refL
) that should be impressed a constant voltage. When ripple
or spike noise is input to this terminal, there is fear that the accuracy of D/A conversion becomes lower and
this IC malfunction. So, when use this IC, please connect capacitor between these terminals (Vcc, V
refU
, V
refL
)
and GND for stable D/A conversion.
· This IC’s output amplifier has an advantage to capacitive load, So, it’s no problem at device action when
connect capacitor ( 0.1µF Max ) among output to GND for every noise elimination.
V
refL
V
refU
