MP1907
100V, 2.5A, High Frequency
Half-bridge Gate Driver
MP1907 Rev. 1.2 www.MonolithicPower.com 1
4/16/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
The Future of Analog IC Technology
DESCRIPTION
The MP1907 is a high frequency, 100V half
bridge N-channel power MOSFET driver. Its low
side and high side driver channels are
independently controlled and matched with less
than 5ns in time delay. Under-voltage lock-out
both high side and low side supplies force their
outputs low in case of insufficient supply. Both
outputs will remain low until a rising edge on
either input is detected. The integrated
bootstrap diode reduces external component
count.
FEATURES
Drives N-channel MOSFET half bridge
100V V
BST
voltage range
Input signal overlap protection
On-chip bootstrap diode
Typical 20ns propagation delay time
Less than 5ns gate drive mismatch
Drive 1nF load with 12ns/9ns rise/fall times
with 12V VDD
TTL compatible input
Less than 150μA quiescent current
Less than 5
μA shutdown current
UVLO for both high side and low side
In 3×3mm QFN10 Packages
APPLICATIONS
Battery Powered Hand Tool
Telecom half bridge power supplies
Avionics DC-DC converters
Active-clamp Forward Converters
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks o
f
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
Micro
Controller
3.3V
BATT
CONTROL
Floating
Driver
Low -side
Driver
M
MP1907
INH
INL
EN
VDD
BST
DRVH
SW
DRVL
13
4
5
10
9
7
6
8
VSS
MP1907100V, 2.5A, HIGH FREQUENCY HALF-BRIDGE GATE DRIVER
MP1907 Rev. 1.2 www.MonolithicPower.com 2
4/16/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
ORDERING INFORMATION
Part Number* Package Top Marking
MP1907GQ QFN10 (3 x 3 mm) ADE
* For Tape & Reel, add suffix –Z (e.g. MP1907GQ–Z);
PACKAGE REFERENCE
ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage (V
DD
).....................-0.3V to +20V
SW Voltage (V
SW
) .........................-5.0V to 105V
BST Voltage (V
BST
) .......................-0.3V to 110V
BST to SW ....................................-0.3V to +18V
DRVH to SW.............. -0.3V to (BST-SW) +0.3V
DRVL to VSS ...................... -0.3V to (V
DD
+0.3V)
All Other Pins..................................-0.3V to 20V
Continuous Power Dissipation (T
A
=+25°C)
(2)
QFN10 (3x3) .............................................. 2.5W
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -65°C to +150°C
Recommended Operating Conditions
(3)
Supply Voltage (V
DD
)................. +4.5V to 18V
(4)
SW Voltage (V
SW
) .........................-1.0V to 100V
SW slew rate......................................<50V/nsec
Operating Junction Temp. (T
J
). -40°C to +125°C
Thermal Resistance
(5)
θ
JA
θ
JC
QFN10 (3x3)........................... 50...... 12... °C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function
of the maximum junction temperature T
J
(MAX), the
junction-to-ambient thermal resistance θ
JA
, and the
ambient temperature T
A
. The maximum allowable
continuous power dissipation at any ambient
temperature is calculated by P
D
(MAX) = (T
J
(MAX)-
T
A
)/θ
JA
. Exceeding the maximum allowable powe
r
dissipation will cause excessive die temperature, and
the regulator will go into thermal shutdown. Internal
thermal shutdown circuitry protects the device from
permanent damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) 4.5V is only a typical value for minimum supply voltage at V
DD
falling
5) Measured on JESD51-7, 4-layer PCB.
MP1907100V, 2.5A, HIGH FREQUENCY HALF-BRIDGE GATE DRIVER
MP1907 Rev. 1.2 www.MonolithicPower.com 3
4/16/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
V
DD
= V
BST
-V
SW
=12V, V
SS
=V
SW
= 0V, V
EN
=3.3V, No load at DRVH and DRVL, T
A
= +25°C, unless
otherwise noted.
Parameter Symbol Condition Min Typ Max Units
Supply Current
VDD Shutdown Current I
SHDN
V
EN
=0, 0 1 µA
VDD quiescent current I
DDQ
INL=INH=0 80 100 µA
VDD operating current I
DDO
fsw=500kHz 2.8 3.5 mA
Floating driver quiescent current I
BSTQ
INL=0, INH=0 or 1 55 70 µA
Floating driver operating current I
BSTO
fsw=500kHz 2.1 3 mA
Leakage Current I
LK
BST=SW=100V 0.05 1
μA
Inputs
INL/INH High 2.4 V
INL/INH Low 1 V
INL/INH Hysteresis 0.6 V
INL/INH internal pull-down
resistance
R
IN
185
kΩ
Under Voltage Protection
VDD rising threshold V
DDR
4.6 5.0 5.4 V
VDD falling threshold V
DDF
4.1 4.5 4.9 V
(BST-SW) rising threshold V
BSTR
4.6 5.0 5.4 V
(BST-SW) falling threshold V
BSTF
4.1 4.5 4.9 V
EN Input Logic Low 0.7 V
EN Input Logic High 1.5 V
EN Hysteresis 100 mV
V
EN
=2V, T
A
=+25°C
10 µA
EN Input Current I
EN
V
EN
=5V, T
A
=-10°C to +70°C
35
(6)
µA
EN internal pull-down resistance R
EN
200
kΩ
Bootstrap Diode
Bootstrap diode VF @ 100uA V
F1
0.55 V
Bootstrap diode VF @ 100mA V
F2
1 V
Bootstrap diode dynamic R R
D
@ 100mA 2.7
Ω
Low Side Gate Driver
Low level output voltage V
OLL
I
O
=100mA 0.15 0.22 V
High level output voltage to rail V
OHL
I
O
=-100mA 0.45 0.6 V
V
DRVL
=0V, V
DD
=4.5V
(8)
0.15 A
V
DRVL
=0V, V
DD
=12V 1.5 A
Peak pull-up current
(7)
I
OHL
V
DRVL
=0V, V
DD
=16V 2.5 A
V
DRVL
=V
DD
=4.5V
(8)
0.25 A
V
DRVL
=V
DD
=12V 2.5 A
Peak pull-down current
(7)
I
OLL
V
DRVL
=V
DD
=16V
3.5 A
Floating Gate Driver
Low level output voltage V
OLH
I
O
=100mA
0.15 0.22 V

MP1907GQ-P

Mfr. #:
Manufacturer:
Monolithic Power Systems (MPS)
Description:
Gate Drivers 100V 2.5A Half Bridge Gate Driver
Lifecycle:
New from this manufacturer.
Delivery:
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