CMR with Other Drive Circuits
CMR performance with drive circuits other than that
shown in Figure 13 may be enhanced by following these
guidelines:
1. Use of drive circuits where current is shunted from the
LED in the LED “o” state (as shown in Figures 15 and
16). This is benecial for good CM
H
.
2. Use of typical I
FH
= 6mA per datasheet recommendation
Using any one of the drive circuits in Figures 15-17 with
I
F
= 6 mA will result in a typical CMR of 10 kV/μs for ACPL-
M75L, as long as the PC board layout practices are fol-
lowed. Figure 15 shows a circuit which can be used with
any totem-pole-output TTL/LSTTL/HCMOS logic gate. The
buer PNP transistor allows the circuit to be used with
logic devices which have low current-sinking capability.
It also helps maintain the driving-gate power-supply cur-
rent at a constant level to minimize ground shifting for
other devices connected to the input-supply ground.
When using an open-collector TTL or open-drain CMOS
logic gate, the circuit in Figure 16 may be used. When
using a CMOS gate to drive the optocoupler, the circuit
shown in Figure 17, where the resistor is recommended to
connect to the anode of the LED, may be used.
GND
2
V
DD2
0.1µF
GND
1
R
total
= 300
- for V
DD
=3.3V
= 580Ω- for V
DD
=5V
1/2R
total
1/2R
total
V
DD1
SHIELD
V
O
74LS04 OR ANY TOTEM-
POLE OUTPUT LOGIC GATE
Figure 13. Recommended drive circuit for ACPL-M75L for high-CMR
GND
2
V
O
V
DD2
0.1µF
½ R
total
SHIELD
½ R
total
I
LN
I
LP
C
LC
C
LA
15pF
530 Ω
3
1
2N3906
(ANY PNP)
V
DD
74L504
(ANY
TTL/CMOS
GATE)
ACPL-M75L
LED
Figure 14. AC equivalent of ACPL-M75L
Figure 15. TTL interface circuit for the ACPl-M75L families.
