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LTM8050MPY#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
LTM8050
16
8050fc
For more information www.linear.com/LTM8050
APPLICATIONS INFORMATION
Figure 2. The Input Diode Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also Protects
the Circuit from a Reversed Input. The LTM8050 Runs Only
When the Input is Present
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 3
for a suggested layout. Ensure that the grounding and
heat sinking are acceptable.
1. Place the R
FB
and R
T
resistors as close as possible to
their respective pins.
2. Place the C
IN
capacitor as close as possible to the V
IN
and GND connection of the LTM8050.
3. Place the C
OUT
capacitor as close as possible to the
V
OUT
and GND connection of the LTM8050.
4. Place the C
IN
and C
OUT
capacitors such that their
ground current flow directly adjacent to or underneath
the LTM8050.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8050.
6. For good heat sinking, use vias to connect the GND cop
-
per area
to the board’s internal ground planes. Liberally
distribute
these GND vias to provide both a good ground
connection and thermal path to the internal planes of the
printed circuit board. Pay attention to the location and
density of the thermal vias in Figure 3. The LTM8050
can benefit from the heat-sinking afforded by vias that
connect to internal GND planes at these locations, due to
their proximity to internal power handling components.
The optimum number of thermal vias depends upon
the printed circuit board design. For example, a board
might use very small via holes. It should employ more
thermal vias than a board that uses larger holes.
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8050. However, these capacitors
can cause problems if the LTM8050 is plugged into a live
supply (see Linear Technology Application Note 88 for a
complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the volt
-
age at the V
IN
pin of the LTM8050 can ring to more than
twice the nominal input voltage, possibly exceeding the
LTM8050’s
rating and damaging the part. If the input
supply is poorly controlled or the user will be plugging
the LTM8050 into an energized supply, the input network
should be designed to prevent this overshoot. This can be
accomplished by installing a small resistor in series to V
IN
,
but the most popular method of controlling input voltage
overshoot is to add an electrolytic bulk capacitor to the
V
IN
net. This capacitor’s relatively high equivalent series
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of
the circuit, though it is likely to be the largest component
in the circuit.
V
IN
RUN/SS
RT FB
V
OUT
GND
8050 F02
LTM8050
V
IN
V
OUT
AUX
BIAS
SYNC
BIAS
AUX
V
OUT
V
IN
GND GND
8050 F03
GND
THERMAL VIAS TO GND
R
T
R
FB
PGOOD
C
IN
C
OUT
SYNC
RUN/SS
Figure 3. Layout Showing Suggested External Components, GND
Plane and Thermal Vias
LTM8050
17
8050fc
For more information www.linear.com/LTM8050
Figure 4. In Negative Output Voltage Applications, Prevent Adverse Effects from Fast Rising V
IN
by Adding Clamp and Rectifying Diodes
APPLICATIONS INFORMATION
Negative Output Considerations
The LTM8050 may be configured to generate a negative
output voltage. Examples of this are shown in the Typical
Applications section. For very fast rising input voltages,
care must be taken to ensure that start-up does not cre
-
ate excessive
surge currents that may create unwanted
voltages or even damage the LTM8050.
Consider the circuit in Figure 4. If a step input is applied
between V
IN
and system GND, the C
IN
and C
OUT
capaci-
tors form an AC divider network that tends to create a
positive
voltage on system V
OUT
. In order to protect the
load from seeing an excessive inverted voltage, an anti-
parallel Schottky diode may be used to clamp the voltage.
Furthermore, current flowing out of the BIAS pin can have
adverse affects. To prevent this from happening, apply a
series resistor (about 200Ω) and Schottky diode between
BIAS and its voltage source.
Thermal Considerations
The LTM8050 output current may need to be derated if
it is required to operate in a high ambient temperature or
deliver a large amount of continuous
power. The amount
of
current derating is dependent upon the input voltage,
output power and ambient temperature. The temperature
rise curves given in the Typical Performance Character
-
istics section
can be used as a guide. These curves were
generated by a LTM8050 mounted to a 40cm
2
4-layer FR4
printed circuit board. Boards of other sizes and layer count
can exhibit different thermal behavior, so it is incumbent
upon the user to verify proper operation over the intended
system’s line, load and environmental operating conditions.
The thermal resistance numbers listed in Page 2 of the
data sheet are based on modeling the µModule package
mounted on a test board specified per JESD51-9 (Test
Boards for Area Array Surface Mount Package Thermal
Measurements). The thermal coefficients provided in this
page are based on JESD 51-12 (Guidelines for Reporting
and Using Electronic Package Thermal Information).
For increased accuracy and fidelity to the actual application,
many designers use FEA to predict thermal performance.
To that end, Page 2 of the data sheet typically gives four
thermal coefficients:
θ
JA
– Thermal resistance from junction to ambient
θ
JCbottom
– Thermal resistance from junction to the
bottom of the product case
θ
JCtop
– Thermal resistance from junction to top of the
product case
θ
JB
– Thermal resistance from junction to the printed
circuit board
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
θ
JA
is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
V
IN
RUN/SS
SHARE
RT ADJ
V
OUT
GND
8050 F04
LTM8050
V
IN
V
OUT
(NEGATIVE VOLTAGE)
ADD AN ANTI-PARALLEL
DIODE TO CLAMP POSITIVE
VOLTAGE SPIKE
ADD A SERIES RESISTOR AND
DIODE TO PREVENT CURRENT
FROM FLOWING OUT OF BIAS
INRUSH
CURRENT
CAN CAUSE
A POSITIVE
TRANSIENT
ON V
OUT
C
IN
C
OUT
PGOOD
SYNC
AUX
BIAS
LTM8050
18
8050fc
For more information www.linear.com/LTM8050
APPLICATIONS INFORMATION
still air although natural convection causes the air to move.
This value is determined with the part mounted to a JESD
51-9 defined test board, which does not reflect an actual
application or viable operating condition.
θ
JCbottom
is the thermal resistance between the junction
and bottom of the package with all of the component power
dissipation flowing through the bottom of the package. In
the typical µModule converter, the bulk of the heat flows
out the bottom of the package, but there is always heat
flow out into the ambient environment. As a result, this
thermal resistance value may be useful for comparing
packages but the test conditions don’t generally match
the user’s application.
θ
JCtop
is determined with nearly all of the component power
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule converter are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junc
-
tion to
the top of the part. As in the case of θ
JCbottom
, this
value may be useful for comparing packages but the test
conditions don’t generally match the
user’s application.
θ
JB
is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule converter and into the board, and is really the
sum of the θ
JCbottom
and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two sided,
two layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that none
of these thermal coefficients reflects an actual physical
operating condition of a µModule converter. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
follows:
The blue resistances are contained within the µModule
converter, and the green are
outside.
The
die temperature of the LTM8050 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8050. The bulk of the heat flow out of the LTM8050
is through the bottom of the μModule converter and the
LGA pads into the printed circuit board. Consequently a
poor printed circuit board design can cause excessive
heating, resulting in impaired performance or reliability.
Please refer to the PCB Layout section for printed circuit
board design suggestions.
8050 F04
µMODULE DEVICE
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
CASE (TOP)-TO-AMBIENT
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
JUNCTION A
t
CASE (BOTTOM)-TO-BOARD
RESISTANCE
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LTM8050MPY#PBF

Mfr. #:
Buy LTM8050MPY#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 58V, 2A Buck Module Reg
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