Logic input waveforms inverted for switches that have
the opposite logic sense.
Switch Output
+ 3 V
0.9 x V
OUT
t
r
<
20 ns
t
f
< 20 ns
V
OUT
=V
COM
R
L
R
L
+R
ON
Figure 2. Break-Before-Make Interval
C
L
(includes fixture and stray capacitance)
NC
V
NO
NO
V
NC
0 V
3 V
0 V
Logic
Input
Switch
Output
V
O
V
NC
= V
NO
t
r
< 5 ns
t
f
< 5 ns
90 %
t
D
t
D
IN
COM
V+
GND
V+
C
L
35 pF
V
O
R
L
300 Ω
Figure 3. Charge Injection
Off
OnOn
IN
ΔV
OUT
V
OUT
Q = ΔV
OUT
x C
L
C
L
= 1 nF
COM
R
gen
V
OUT
NC or NO
3 V
IN
V
gen
GND
V+
V+
IN depends on switch configuration: input polarity
determined by sense of switch.
+
www.vishay.com
8
Document Number: 71347
S-72609-Rev. D, 24-Dec-07
Vishay Siliconix
DG9411
TEST CIRCUITS
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?71347.
