8
LT1307/LT1307B
1307fa
OPERATION
The LT1307 combines a current mode, fixed frequency
PWM architecture with Burst Mode micropower operation
to maintain high efficiency at light loads. Operation can
best be understood by referring to the block diagram in
Figure 2. Q1 and Q2 form a bandgap reference core whose
loop is closed around the output of the converter. When
V
IN
is 1V, the feedback voltage of 1.22V, along with an
80mV drop across R5 and R6, forward biases Q1 and Q2’s
base collector junctions to 300mV. Because this is not
enough to saturate either transistor, FB can be at a higher
voltage than V
IN
. When there is no load, FB rises slightly
above 1.22V, causing V
C
(the error amplifier’s output) to
decrease. When V
C
reaches the bias voltage on hysteretic
comparator A1, A1’s output goes low, turning off all
circuitry except the input stage, error amplifier and low-
battery detector. Total current consumption in this state is
50µA. As output loading causes the FB voltage to de-
crease, A1’s output goes high, enabling the rest of the IC.
Switch current is limited to approximately 100mA initially
after A1’s output goes high. If the load is light, the output
voltage (and FB voltage) will increase until A1’s output
goes low, turning off the rest of the LT1307. Low fre-
quency ripple voltage appears at the output. The ripple
frequency is dependent on load current and output capaci-
tance. This Burst Mode operation keeps the output regu-
lated and reduces average current into the IC, resulting in
high efficiency even at load currents of 100µA or less.
If the output load increases sufficiently, A1’s output re-
mains high, resulting in continuous operation. When the
LT1307 is running continuously, peak switch current is
controlled by V
C
to regulate the output voltage. The switch
is turned on at the beginning of each switch cycle. When
the summation of a signal representing switch current and
a ramp generator (introduced to avoid subharmonic oscil-
lations at duty factors greater than 50%) exceeds the V
C
signal, comparator A2 changes state, resetting the flip-
flop and turning off the switch. Output voltage increases as
switch current is increased. The output, attenuated by a
resistor divider, appears at the FB pin, closing the overall
loop. Frequency compensation is provided by an external
series RC network connected between the V
C
pin and
ground. Low-battery detector A4’s open collector output
(LBO) pulls low when the LBI pin voltage drops below
200mV. There is no hysteresis in A4, allowing it to be used
as an amplifier in some applications. The entire device is
disabled when the SHDN pin is brought low. To enable the
converter, SHDN must be at V
IN
or at a higher voltage.
The LT1307B differs from the LT1307 in that there is no
hysteresis in comparator A1. Also, the bias point on A1 is
set lower than on the LT1307 so that switching can occur
at inductor current less than 100mA. Because A1 has no
hysteresis, there is no Burst Mode operation at light loads
and the device continues switching at constant frequency.
This results in the absence of low frequency output voltage
ripple at the expense of efficiency.
The difference between the two devices is clearly illus-
trated in Figures 3 and 4. The top two traces in Figure 3
show an LT1307/LT1307B circuit, using the components
indicated in Figure 1, set to a 5V output. Input voltage is
1.25V. Load current is stepped from 1mA to 41mA for both
circuits. Low frequency Burst Mode operation voltage
ripple is observed on Trace A, while none is observed on
TRACE A
TRACE B
LT1307
V
OUT
500mV/DIV
AC COUPLED
41mA
1mA
I
L
LT1307B
V
OUT
500mV/DIV
AC COUPLED
V
IN
= 1.25V 1ms/DIV 1307 F03
V
OUT
= 5V
Figure 3. LT1307 Exhibits Burst Mode Operation Ripple at
1mA Load, LT1307B Does Not
LT1307
V
OUT
200mV/DIV
AC COUPLED
TRACE A
45mA
5mA
I
L
LT1307B
V
OUT
200mV/DIV
AC COUPLED
TRACE B
V
IN
= 1.5V 500µs/DIV 1307 F04
V
OUT
= 5V
Figure 4. At Higher Loading and a 1.5V Supply, LT1307
Again Exhibits Burst Mode Operation Ripple at 5mA Load,
LT1307B Does Not
APPLICATIO S I FOR ATIO
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