AX−SFUS, AX−SFUS−API
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6
DC Characteristics
Table 4. SUPPLIES
Conditions for all current and charge values unless otherwise specified are for the hardware configuration described in the AX−SFUS
Application Note: Sigfox Compliant Reference Design.
Symbol Description Condition Min Typ Max Units
T
AMB
Operational ambient temperature −40 27 85 °C
VDD
IO
I/O and voltage regulator supply
voltage AX−SFUS chip only
1.8* 3.0 3.6 V
VDD
IO_mod
I/O and voltage regulator supply
voltage AX−SFUS with RF frontend
module as in Figure 5
2.7 3.3 3.6 V
VDD
IO_R1
I/O voltage ramp for reset activation;
Note 1
Ramp starts at VDD_IO ≤ 0.1 V 0.1 V/ms
VDD
IO_R2
I/O voltage ramp for reset activation;
Note 1
Ramp starts at 0.1 V < VDD_IO < 0.7 V 3.3 V/ms
I
DS
Deep sleep mode current; Note 3 AT$P=2 350 nA
I
SLP
Sleep mode current; Note 3 AT$P=1 1.6
mA
I
STDBY
Standby mode current
Notes 2, 3
0.5 mA
I
RX_CONT
Current consumption continuous
RX; Note 3
AT$TM=3,255 34 mA
Q
SFX_OOB_24
Charge to send a Sigfox out of band
message, 24 dBm; Note 3
AT$S0 0.25 C
Q
SFX_BIT_24
Charge to send a bit, 24 dBm;
Note 3
AT$SB=0 0.22 C
Q
SFX_BITDL_24
Charge to send a bit with downlink
receive, 24 dBm; Note 3
AT$SB=0,1 0.28 C
Q
SFX_LFR_24
Charge to send the longest possible
Sigfox frame (12 byte) , 24 dBm;
Note 3
AT$SF=00112233445566778899aabb 0.73 C
Q
SFX_LFRDL_24
Charge to send the longest possible
Sigfox frame (12 byte) with downlink
receive, 24 dBm; Note 3
AT$SF=00112233445566778899aabb,1 0.84 C
I
TXMOD24AVG
Modulated Transmitter Current;
Note 3
Pout=24 dBm; average 230 mA
*The device is operational from 1.8 V to 3.6 V. However, a supply voltage below 2.0 V is considered an extreme condition and operation can
lead to reduced output power and increased spurious emission.
1. If VDD_IO ramps cannot be guaranteed, an external reset circuit is recommended, see the AX8052 Application Note: Power On Reset
2. Internal 20 MHz oscillator, voltage conditioning and supervisory circuit running.
3. Includes Front End Module, TCXO.