9
Date: 3/6/06 SP6656, 400mA Synchronous Buck Regulator with Dynamically Adjustable Voltage Output © Copyright 2006 Sipex Corporation
timer. The minimum on-timer times out and
indicates DRVON can be reset if the voltage
loop is satisfied. If V
OUT
is still below the
regulation point RESET is held low until
V
OUT
is above regulation. Once RESET
occurs T
ON
minimum is reset, and the T
OFF
one-shot is triggered to blank the loop com-
parator from starting a new charge cycle for
a minimum period. This blanking period
occurs during the noisy LX transition to
discharge, where spurious comparator
states may occur. For T
OFF
> T
BLANK
the
loop is in a discharge or wait state until the
loop comparator starts the next charge cycle
by DRVON going high.
If an over current occurs during charge the
loop is interrupted and DRVON is RESET.
The off-time one-shot pulse width is wid-
ened to T
OFF
= K
OFF
/ V
OUT
, which holds the
loop in discharge for that time. At the end of
the off-time the loop is released and con-
trolled by VOLOW. In this manner maxi-
mum inductor current is controlled on a
cycle-by-cycle basis. An assertion of UVLO
(undervoltage lockout) or TSD (thermal shut-
down) holds the loop in no-charge until the
fault has ended.
On-Time Control - Discharge Phase
The discharge phase follows with the high
side PMOS switch opening and the low side
NMOS switch closing to provide a discharge
path for the inductor current. The decreas-
ing inductor current and the load current
cause the output voltage to drop. Under
normal load conditions when the inductor
current is below the programmed limit, the
off-time will continue until the output voltage
falls below the regulation threshold, which
initiates a new charge cycle via the loop
comparator.
The inductor current “floats” in continuous
conduction mode. During this mode the
inductor peak current is below the pro-
grammed limit and the valley current is
above zero. This is to satisfy load currents
that are greater than half the minimum cur-
rent ripple. The current ripple, I
LR
, is defined
by the equation:
I
LR
≈
KON
*
VIN - VOUT - IOUT * RCH
L
V
IN
- V
OUT
where:
L = Inductor value
I
OUT
= Load current
R
CH
= PMOS on resistance, 0.3Ω typ.
If the I
OUT
* R
CH
term is negligible compared
with (V
IN
- V
OUT
), the above equation simpli-
fies to:
I
LR
≈
KON
L
For most applications, the inductor current
ripple controlled by the SP6656 is constant
regardless of input and output voltage.
The maximum loop frequency in CCM is
defined by the equation:
F
LP
≈
(VIN - VOUT) * (VOUT + IOUT * RDC)
K
ON
*
[V
IN
+ I
OUT
*
(R
DC
- R
CH
)]
where:
F
LP
= CCM loop frequency
R
DC
= NMOS on resistance, 0.3Ω typ.
Ignoring conduction losses simplifies the
loop frequency to:
F
LP
≈
1
*
VOUT
* (V
IN
- V
OUT
)
K
ON
V
IN
AND’ing the loop comparator and the on-
timer reduces the switching frequency for
load currents below half the inductor ripple
current. This increases light load efficiency.
The minimum on-time insures that the in-
ductor current ripple is a minimum of K
ON
/L,
more than the load current demands. The
converter goes in to a standard pulse fre-
quency modulation (PFM) mode where the
switching frequency is proportional to the
load current.
THEORY OF OPERATION
