FEMTOCLOCK® CRYSTAL-TO-LVPECL
375MHZ, FREQUENCY MARGINING SYNTHESIZER
843201-375 DATA SHEET
10 REVISION A 8/21/15
APPLICATION INFORMATION
CRYSTAL INPUT INTERFACE
The 8 43 201-3 75 has been characterized with 18 pF
parallel resonant crystals. The capacitor values shown in
FIGURE 1. CRYSTAL INPUt INTERFACE
Figure 1 below were determined using a 25MHz, 18pF parallel
resonant crystal and were chosen to minimize the ppm error.
INPUTS:
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional protection.
A 1kΩ resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT PINS
REVISION A 8/21/15
843201-375 DATA SHEET
11 FEMTOCLOCK® CRYSTAL-TO-LVPECL
375MHZ, FREQUENCY MARGINING SYNTHESIZER
TERMINATION FOR 3.3V LVPECL OUTPUT
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are recom-
mended only as guidelines.
The differential outputs are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50Ω
FIGURE 2B. LVPECL OUTPUT TERMINATIONFIGURE 2A. LVPECL OUTPUT TERMINATION
transmission lines. Matched impedance techniques should be used
to maximize operating frequency and minimize signal distortion.
Figures 2A and 2B show two different layouts which are recom-
mended only as guidelines. Other suitable clock layouts may exist
and it would be recommended that the board designers simulate
to guarantee compatibility across all printed circuit and clock com-
ponent process variations.
FEMTOCLOCK® CRYSTAL-TO-LVPECL
375MHZ, FREQUENCY MARGINING SYNTHESIZER
843201-375 DATA SHEET
12 REVISION A 8/21/15
TERMINATION FOR 2.5V LVPECL OUTPUT
Figure 3A and Figure 3B show examples of termination for
2.5V LVPECL driver. These terminations are equivalent to
terminating 50Ω to V
CC
- 2V. For V
CC
= 2.5V, the V
CC
- 2V is
very close to ground level. The R3 in Figure 3B can be
eliminated and the termination is shown in Figure 3C.
FIGURE 3C. 2.5V LVPECL TERMINATION EXAMPLE
FIGURE 3B. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 3A. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
R2
62.5
Zo = 50 Ohm
R1
250
+
-
2.5V
2,5V LVPECL
Driver
R4
62.5
R3
250
Zo = 50 Ohm
2.5V
VCC=2.5V
R1
50
R3
18
Zo = 50 Ohm
Zo = 50 Ohm
+
-
2,5V LVPECL
Driver
VCC=2.5V
2.5V
R2
50
2,5V LVPECL
Driver
VCC=2.5V
R1
50
R2
50
2.5V
Zo = 50 Ohm
Zo = 50 Ohm
+
-

843201AG-375LF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner 1 LVPECL OUT SYNTHESIZER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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