MAX5360/MAX5361/MAX5362
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
4 _______________________________________________________________________________________
TIMING CHARACTERISTICS (continued)
(V
DD
= 2.7V to 3.6V (MAX5360); V
DD
= 4.5V to 5.5V (MAX5361); V
DD
= 2.7V to 5.5V (MAX5362); R
L
=10kΩ, C
L
= 50pF, T
A
= T
MAX
to
T
MIN
, Figure 3, unless otherwise noted. Typical values are T
A
= +25°C.)
Data Hold Time t
HD, DAT
0 0.9 µs
Data Setup Time t
SU, DAT
100 ns
Rise Time of Both SDA and
SCL Signals
t
r
300 ns
Fall Time of Both SDA and
SCL Signals
t
f
CONDITIONS
300 ns
Setup Time for STOP Condition t
SU, STO
0.6 µs
Capacitive Load for Each
Bus Line
C
b
400 pF
µs0.6t
SU, STA
Setup Time for a Repeated
START Condition
UNITSMIN TYP MAXSYMBOLPARAMETER
Note 1: Guaranteed from code 1 to code 63.
Note 2: The offset value extrapolated from the range over which the INL is guaranteed.
Note 3: MAX5362, tested at V
DD
= 5V ±10%.
Note 4: MAX5360, tested at V
DD
= 3V ±10%; MAX5361, tested at V
DD
= 5V ±10%.
Note 5: Actual output voltage at full scale is 63/64
V
REF
.
Note 6: Output settling time is measured by taking the code from code 1 to code 63, and from code 63 to code 1.
Note 7: Guaranteed by design.
Typical Operating Characteristics
(V
DD
= 3V (MAX5360), V
DD
= 5V (MAX5361/MAX5362), T
A
= +25°C, unless otherwise noted.)
