AD1953
–12–
quality of compressed audio. In addition, the main channels
have a stereo widening algorithm that increases the perceived
spread of the stereo image.
Most of the signal processing functions are coded using full 48-bit
double-precision arithmetic. The input word length is 24 bits,
with two extra headroom bits added in the processor to allow
internal gains up to 12 dB without clipping (additional gains can
be accommodated by scaling down the input signal in the first
biquad filter section).
A graphical user interface (GUI) is available for evaluation of
the AD1953 (Figure 3). This GUI controls all of the functions
of the chip in a very straightforward and user-friendly interface.
No code needs to be written to use the GUI to control the chip.
SIGNAL PROCESSING
Signal Processing Overview
Figure 2 shows the signal processing flow diagram of the AD1953.
The AD1953 is designed to provide all common signal-processing
functions commonly used in 2.0 or 2.1 playback systems. A
7-biquad equalizer operates on the stereo input signal. The
output of this equalizer is fed to a 2-biquad crossover filter for
the main channels, and the mono sum of the left and right equalizer
outputs is fed to a 3-biquad crossover filter for the Sub channel.
Each of the three channels has independent delay compensa-
tion. There are two high quality compressor/limiters available:
one operating on the left/right outputs and one operating on the
subwoofer channel. The subwoofer output may be blended back
into the left/right outputs for 2.0 playback systems. In this
configuration, the two independent compressor/limiters provide
2-band compression, which significantly improves the sound
HPF/
DE-EMPHASIS
IN
RIGHT
IN
LEFT
VOLUME
VOLUME
PHAT STEREO
DELAY
(0ms–3.7ms)
DELAY
(0ms–3.7ms)
DELAY
(0ms–2.3ms)
8
INTERPOLATION
DAC
OUT
LEFT
8
INTERPOLATION
DAC
OUT
RIGHT
VOLUME
1 BIQUAD
FILTER
DELAY
(0ms–3.7ms)
MONO DAC
L/R REINJECTION
LEVEL
SUBWOOFER
OUTPUT
SUB DYNAMICS PROCESSOR
SUB CHANNEL
L/R MIX
EQ AND CROSSOVER FILTERS
L/R DYNAMICS PROCESSOR
LEVEL DETECT,
LOOK-UP TABLE
LEVEL DETECT,
LOOK-UP TABLE
7 BIQUAD
FILTERS
7 BIQUAD
FILTERS
CROSSOVER
(2 FILTERS)
CROSSOVER
(2 FILTERS)
CROSSOVER
(3 FILTERS)
DELAY
(0ms–2.3ms)
HPF/
DE-EMPHASIS
Figure 2. Signal Processing Flow
Figure 3. Graphical User Interface
REV. A
For more information on AD1953 software tools, visit,
www.analog.com/SigmaStudio.
AD1953
–13–
Each section of this flow diagram will be explained in detail on
the following pages.
Numeric Formats
It is common in DSP systems to use a standardized method of
specifying numeric formats. To better comprehend issues relat-
ing to precision and overflow, it is helpful to think in terms of
fractional twos complement number systems. Fractional
number systems are specified by an A.B format, where A is the
number of bits to the left of the decimal point and B is the
number of bits to the right of the decimal point. In a twos
complement system, there is also an implied offset of one-half of
the binary range; for example, in a twos complement 1.23 sys-
tem, the legal signal range is –1.0 to (+1.0 – 1 LSB).
The AD1953 uses two different numeric formats; one for the
coefficient values (stored in the parameter RAM) and one for
the signal data values. The coefficient format is as follows:
Coefficient Format
Coefficient format: 2.20
Range: –2.0 to (+2.0 – 1 LSB)
Examples:
1000000000000000000000 = –2.0
1100000000000000000000 = –1.0
1111111111111111111111 = (1 LSB below 0.0)
0000000000000000000000 = 0.0
0100000000000000000000 = 1.0
0111111111111111111111 = (2.0 – 1 LSB)
This format is used because standard biquad filters require
coefficients that range between +2.0 and –2.0. It also allows
gain to be inserted at various places in the signal path.
Internal DSP Signal Data Format
Input data format: 1.23
This is sign-extended when written to the data memory of the
AD1953.
Internal DSP signal data format: 3.23
Range: –4.0 to (+4.0 – 1 LSB)
Examples:
10000000000000000000000000 = –4.0
11000000000000000000000000 = –2.0
11100000000000000000000000 = –1.0
11111111111111111111111111 = (1 LSB below 0.0)
00000000000000000000000000 = 0.0
00100000000000000000000000 = 1.0
01000000000000000000000000 = 2.0
01111111111111111111111111 = (4.0 – 1 LSB).
The sign-extension between the serial port and the DSP core
allows for up to 12 dB of gain in the signal path without internal
clipping. Gains greater than 12 dB can be accommodated by
scaling the input down in the first biquad filter, and scaling the
signal back up at the end of the biquad filter section.
A digital clipper circuit is used between the output of the DSP
core and the input to the DAC Σ-Δ modulators to prevent over-
loading the DAC circuitry (see Figure 4). Note that there is a
gain factor of 0.75 used in the DAC interpolation filters, and
therefore signal values of up to 1/0.75 will pass through the DSP
without clipping. Since the DAC is designed to produce an
analog output of 2 V rms (differential) with a 0 dB digital input,
signals between 0 dB and 1/0.75 (approximately 3 dB) will produce
larger analog outputs and result in slightly degraded analog per-
formance. This extra analog range is necessary in order to pass 0
dBFS square waves through the system, as these square waves
cause overshoots in the interpolation filters that would otherwise
briefly clip the digital DAC circuitry.
A separate digital clipper circuit is used in the DSP core to
ensure that any accumulator values that exceed the numeric
3.23 format range are clipped when taken from the accumulator.
High-Pass Filter
The high-pass filter is a first-order double-precision design. The
purpose of the high-pass filter is to remove digital dc from the
input. If this dc were allowed to pass, the detectors used in the
compressor/limiter would give an incorrect reading for low
signal levels.
The high-pass filter is controlled by a single parameter
(alpha_HPF), which is programmed by writing to SPI location
180 in 2.20 twos complement format. The following equation
can be used to calculate the parameter Alpha_HPF from the –3 dB
point of the filter:
Alpha HPF EXP
HPF CUTOFF
f
S
_.
–. _
=
××
10
20 π
where EXP is the exponential operator, HPF_CUTOFF is the
high-pass cutoff in Hz, and f
S
is the audio sampling rate.
The default value for the –3 dB cutoff of the high-pass filter is
2.75 Hz at a sampling rate of 44.1 kHz.
b0
IN
OUT
b1
b2
a1
a2
Z
–1
Z
–1
Z
–1
Z
–1
Figure 5. Biquad Filter
Biquad Filters
Each of the two input channels has seven second-order biquad
sections in the signal path. In addition, the left and right chan-
nels have two additional biquad filters that may be used either
as crossover filters or as additional equalization filters. The sub
channel has three additional biquad filters, also to be used as
equalization and/or crossover filters. In a typical scenario, the
SIGNAL PROCESSING
(3.23 FORMAT)
SERIAL PORT
DAC INTERPOLATION
FILTERS (3.23 FORMAT)
DIGITAL -
MODULATORS
(1.23 FORMAT)
DIGITAL
CLIPPER
DATA IN
2-BIT SIGN EXTENTION
0.75
1.23
3.23
Figure 4. Numeric Precision and Clipping Structure
REV. A
AD1953
–14–
first seven biquads would be used for speaker equalization and/
or tone controls, and the remaining filters would be programmed
to function as crossover filters. Note that there is a common
equalization section used for both the main and sub channels,
followed by crossover filters. This arrangement prevents any
interaction from occurring between the crossover filters and the
equalization filters. One section of the biquad IIR filter is shown
in Figure 5.
This section implements the transfer function:
HZ
bbZ bZ
aZ a Z
()
=
+ ×
()
−× ×
()
01 2
11 2
12
12
––
––
The coefficients a1, a2, b0, b1, and b2 are all in twos comple-
ment 2.20 format with a range from –2 to (+2 – 1 LSB). The
negative sign on the a1 and a2 coefficients is the result of adding
both the feed-forward “b” terms as well as the feedback “a” terms.
Some digital filter packages automatically produce the correct
a1 and a2 coefficients for the topology of Figure 5, while others
assume a denominator of the form 1 + a1 × Z
–1
+ a2 × Z
–1
. In this
case, it may be necessary to invert the a1 and a2 terms for
proper operation.
The biquad structure shown in Figure 5 is coded using double-
precision math to avoid limit cycles from occurring when low
frequency filters are used. The coefficients are programmed by
writing to the appropriate location in the parameter RAM through
the SPI port (see Table VI). There are two possible scenarios
for controlling the biquad filters:
1. Dynamic Adjustment (for example, Bass/Treble control or Para-
metric Equalizer)
When using dynamic filter adjustment, it is highly recommended
that the user employ the safeload mechanism to avoid temporary
instability when the filters are dynamically updated. This can
occur if some, but not all, of the coefficients are updated to new
values when the DSP calculates the filter output. The operation
of the Safeload registers is detailed in the Options for Parameter
Updates section.
2. Setting Static EQ Curve after Power-Up
If many of the biquad filters need to be initialized after power-
up (for example, to implement a static speaker-correction
curve), the recommended procedure is to set the processor
shutdown bit, wait for the volume to ramp down (about 20 ms),
and then write directly to the parameter RAM in Burst
Mode. After the RAM is loaded, the shutdown bit can be
deasserted, causing the volume to ramp back up to the initial
value. This entire procedure is click-free and faster than using
the Safeload mechanism.
The datapaths of the AD1953 contain an extra two bits on top
of the 24 bits that are input to the serial port. This allows up to
12 dB of boost without clipping. However, it is important to
remember that it is possible to design a filter that has less than
12 dB of gain at the final filter output, but more than 12 dB of
gain at the output of one or more intermediate biquad filter
sections. For this reason, it is important to cascade the filter
sections in the correct order, putting the sections with the
largest peak gains at the end of the chain rather than at the
beginning. This is standard practice when coding IIR filters and
is covered in basic books on DSP coding.
If gains larger than 12 dB cannot be avoided, then the coeffi-
cients b0 through b2 of the first biquad section may be scaled
down to fit the signal into the 12 dB maximum signal range, and
then scaled back up at the end of the filter chain.
Volume
Eight separate SPI registers are available to control the volume.
Three registers are used by the on-board program—one each for
the Left, Right, and Sub channels. These registers are special in
that they include automatic digital ramp circuitry for clickless
volume adjustment. The volume control word is in 2.20 format,
and gains from +2.0 to –2.0 are possible. The default value is
1.0. It takes 1024 audio frames to adjust the volume from 2.0
down to 0; in the normal case where the max volume is set to
1.0, it will take 512 audio frames for this ramp to reach zero.
Note that a Mute command is the same as setting the volume to
zero, except that when the part is unmuted, the volume returns to
its original value. These volume ramp times assume that the
AD1953 is set for the fast volume ramp speed. If the slow
setting is selected, it will take 8192 audio frames to reach zero
from a setting of 2.0. Correspondingly, it will take 4096 frames
to reach 0 volume from the normal setting of 1.0.
The volume blocks are placed after the biquad filter sections to
maximize the level of the signal that is passed through the filter
sections. In a typical situation, the nominal volume setting might be
–15 dB, allowing a substantial increase in volume when the user
increases the volume. The AD1953 was designed with an analog
dynamic range of > 112 dB, so that in the typical situation with
the volume set to –15 dB, the signal-to-noise ratio at the output
will still exceed 97 dB. Greater output dynamic ranges are possible
if the compressor/limiter is used, as the post-compression gain
parameter can boost the signal back up to a higher level. In this
case, the compressor will prevent the output from clipping when
the volume is turned up and the input signal is large.
Stereo Image Expander
The image-enhancement processing is based on ADI’s patented
Phat Stereo algorithm. The block diagram is shown in Figure 6.
1kHz
FIRST-ORDER LPF
LEVEL
LEFT IN
RIGHT IN
LEFT OUT
RIGHT OUT
+
+
Figure 6. Stereo Image Expander
The algorithm works by increasing the phase shift for low
frequency signals that are panned left or right in the stereo mix.
Since the ear is responsive to interaural phase shifts below 1 kHz,
this increase in phase shifts results in a widening of the stereo
image. Note that signals panned to the center are not processed,
resulting in a more natural sound. There are two parameters
that control the Phat Stereo algorithm: the Level variable,
which controls how much out-of-phase information is added to
the left and right channels, and the cutoff frequency of the
first-order low-pass filter, which determines the frequency range
of the added out-of-phase signals. For best results, the cutoff
frequency should be in the range of 500 Hz to 2 kHz. These
parameters are controlled by altering the parameter RAM locations
that store the parameters spread_level and alpha_spread.
REV. A

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