ADP3178JRZ-REEL7 Datasheet ADP3178JRZ-REEL7 | P1-P3

REV. A

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ADP3158/ADP3178

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700 www.analog.com

Fax: 781/326-8703 © Analog Devices, Inc., 2001

4-Bit Programmable

Synchronous Buck Controllers

FUNCTIONAL BLOCK DIAGRAM

CMP

+–

DRVH

LRDRV2

LRFB2

LRFB1

LRDRV1

COMP

DRVL

GND

CS–

CS+

PWM

DRIVE

VCC CT

OSCILLATOR

UVLO

& BIAS

REFERENCE

REF

LR1

LR2

REF

VID DAC

DAC+20%

ADP3158/ADP3178

VID3 VID2 VID1 VID0

FEATURES

Optimally Compensated Active Voltage Positioning

with Gain and Offset Adjustment (ADOPT™) for

Superior Load Transient Response

Complies with VRM Specifications with Lowest

System Cost

4-Bit Digitally Programmable 1.3 V to 2.05 V Output

N-Channel Synchronous Buck Driver

Total Accuracy 0.8% Over Temperature

Two On-Board Linear Regulator Controllers Designed

to Meet System Power Sequencing Requirements

High Efficiency Current-Mode Operation

Short Circuit Protection for Switching Regulator

Overvoltage Protection Crowbar Protects Micro-

processors with No Additional External Components

APPLICATIONS

Core Supply Voltage Generation for:

Intel Pentium

III

Intel Celeron™

GENERAL DESCRIPTION

The ADP3158 and ADP3178 are highly efficient synchronous

buck switching regulator controllers optimized for converting a

5 V main supply into the core supply voltage required by high-

performance processors. These devices use an internal 4-bit DAC

to read a voltage identification (VID) code directly from the

processor, which is used to set the output voltage between 1.3 V

and 2.05 V. They use a current mode, constant off-time archi-

tecture to drive two N-channel MOSFETs at a programmable

switching frequency that can be optimized for regulator size and

efficiency.

The ADP3158 and ADP3178 also use a unique supplemental

regulation technique called Analog Devices Optimal Positioning

Technology (ADOPT) to enhance load transient performance.

Active voltage positioning results in a dc/dc converter that

meets the stringent output voltage specifications for high-

performance processors, with the minimum number of output

capacitors and smallest footprint. Unlike voltage-mode and

standard current-mode architectures, active voltage positioning

adjusts the output voltage as a function of the load current so it

is always optimally positioned for a system transient. They also

provide accurate and reliable short circuit protection and

adjustable current limiting. The devices include an integrated

overvoltage crowbar function to protect the microprocessor

from destruction in case the core supply exceeds the nominal

programmed voltage by more than 20%.

The ADP3158 and ADP3178 contain two linear regulator

controllers that are designed to drive external N-channel

MOSFETs. The outputs are internally fixed at 2.5 V and 1.8 V

in the ADP3158, while the ADP3178 provides adjustable out-

puts that are set using an external resistor divider. These

linear regulators are used to generate the auxiliary voltages

(AGP, GTL, etc.) required in most motherboard designs,

and have been designed to provide a high bandwidth load-

transient response.

The ADP3158 and ADP3178 are specified over the commercial

temperature range of 0°C to 70°C and are available in a 16-lead

SOIC package.

ADOPT is a trademark of Analog Devices, Inc.

Pentium is a registered trademark of Intel Corporation.

Celeron is a trademark of Intel Corporation.

REV. A

–2–

ADP3158/ADP3178–SPECIFICATIONS

(VCC = 12 V, T

= 0C to 70C, unless otherwise noted.)

Parameter Symbol Conditions Min Typ Max Unit

SWITCHING REGULATOR

Output Accuracy V

CS–

1.3 V Output Figure 1 1.289 1.3 1.311 V

1.65 V Output Figure 1 1.637 1.65 1.663 V

2.05 V Output Figure 1 2.034 2.05 2.066 V

Line Regulation ∆V

OUT

VCC = 10 V to 14 V 0.06 %

Crowbar Trip Point V

CROWBAR

% of Nominal DAC Voltage 115 120 125 %

Crowbar Reset Point % of Nominal DAC Voltage 40 50 60 %

Crowbar Response Time t

CROWBAR

Overvoltage to DRVL Going High 400 ns

VID INPUTS

Input Low Voltage V

IL(VID)

0.6 V

Input High Voltage V

IH(VID)

2.0 V

Input Current I

VID

VID(X) = 0 V 185 250 µA

Pull-Up Resistance R

VID

20 30 kΩ

Internal Pull-Up Voltage 5.0 5.4 5.7 V

OSCILLATOR

Off Time T

= 25°C, CT = 200 pF 3.5 4.0 4.5 µs

CT Charge Current I

= 25°C, V

OUT

in Regulation 130 150 170 µA

= 25°C, V

OUT

= 0 V 253545 µA

ERROR AMPLIFIER

Output Resistance R

O(ERR)

1MΩ

Transconductance g

m(ERR)

2.05 2.2 2.35 mmho

Output Current I

O(ERR)

CS– Forced to V

OUT

– 3% 625 µA

Maximum Output Voltage V

COMP(MAX)

CS– Forced to V

OUT

– 3% 3.0 V

Output Disable Threshold V

COMP(OFF)

600 750 900 mV

–3 dB Bandwidth BW

ERR

COMP = Open 500 kHz

CURRENT SENSE

Threshold Voltage V

CS(TH)

CS– Forced to V

OUT

– 3% 69 78 87 mV

CS– ≤ 0.45 V 35 45 54 mV

0.8 V ≤ COMP ≤ 1 V 1 5 mV

Input Bias Current I

CS+

, I

CS–

CS+ = CS– = V

OUT

0.5 5 µA

Response Time t

CS+ – (CS–) > 87 mV to DRVH 50 ns

Going Low

OUTPUT DRIVERS

Output Resistance R

O(DRV(X))

= 50 mA 6 Ω

Output Transition Time t

, t

= 3000 pF 80 ns

LINEAR REGULATORS

Feedback Current I

FB(X)

0.3 1 µA

LR1 Feedback Voltage V

LRFB(1)

ADP3158, Figure 2, 2.44 2.5 2.56 V

VCC = 4.5 V to 12.6 V

ADP3178, Figure 2, 0.97 1.0 1.03 V

VCC = 4.5 V to 12.6 V

LR2 Feedback Voltage V

LRFB(2)

ADP3158, Figure 2, 1.75 1.8 1.85 V

VCC = 4.5 V to 12.6 V

ADP3178, Figure 2, 0.97 1.0 1.03 V

VCC = 4.5 V to 12.6 V

Driver Output Voltage V

LRDRV(X)

VCC = 4.5 V, V

LRFB(X)

= 0 V 4.2 V

SUPPLY

DC Supply Current

79 mA

UVLO Threshold Voltage V

UVLO

6.75 7 7.25 V

UVLO Hysteresis 0.8 1 1.2 V

NOTES

All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC).

Dynamic supply current is higher due to the gate charge being delivered to the external MOSFETs.

Specifications subject to change without notice.

REV. A

ADP3158/ADP3178

–3–

ABSOLUTE MAXIMUM RATINGS*

VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +15 V

DRVH, DRVL, LRDRV1, LRDRV2 . . . . . –0.3 V to VCC + 0.3 V

All Other Inputs and Outputs . . . . . . . . . . . . –0.3 V to +10 V

Operating Ambient Temperature Range . . . . . . . 0°C to 70°C

Operating Junction Temperature . . . . . . . . . . . . . . . . . 125°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Two-Layer Board . . . . . . . . . . . . . . . . . . . . . . . . . 125°C/W

Four-Layer Board . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . 300°C

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

*This is a stress rating only; operation beyond these limits can cause the device to

be permanently damaged. Unless otherwise specified, all voltages are referenced

to GND.

PIN CONFIGURATION

TOP VIEW

(Not to Scale)

VID0

VID1

VID2

VID3

LRFB1

LRDRV1

CS–

CS+

GND

DRVH

DRVL

VCC

LRFB2

LRDRV2

COMP

ADP3158/

ADP3178

PIN FUNCTION DESCRIPTIONS

Pin Mnemonic Function

1–4 VID0–VID3 Voltage Identification DAC Inputs.

These pins are pulled up to an internal

reference, providing a Logic 1 if left

open. The DAC output programs the CS–

regulation voltage from 1.3 V to 2.05 V.

5, 12 LRFB1, Feedback connections for the linear

LRFB2 regulator controllers.

6, 11 LRDRV1, Gate drives for the respective linear

LRDRV2 regulator N-channel MOSFETs.

7 CS– Current Sense Negative Node. Negative

input for the current comparator. This pin

also connects to the internal error ampli-

fier that senses the output voltage.

8 CS+ Current Sense Positive Node. Positive

input for the current comparator. The

output current is sensed as a voltage at this

pin with respect to CS–.

9 CT External capacitor connected from CT to

ground sets the Off-time of the device.

10 COMP Error Amplifier Output and Compensation

Point. The voltage at this output programs

the output current control level between

CS+ and CS–.

13 VCC Supply Voltage for the device.

14 DRVL Low-Side MOSFET Drive. Gate drive for

the synchronous rectifier N-channel

MOSFET. The voltage at DRVL swings

from GND to VCC.

15 DRVH High-Side MOSFET Drive. Gate drive

for the buck switch N-channel MOSFET.

The voltage at DRVH swings from GND

to VCC.

16 GND Ground Reference. GND should have a

low impedance path to the source of the

synchronous MOSFET.

ORDERING GUIDE

Temperature LDO Package Package

Model Range Voltage Description Option

ADP3158JR 0°C to 70°C 2.5 V, 1.8 V SO = Small Outline Package R-16A (SO-16)

ADP3178JR 0°C to 70°C Adjustable SO = Small Outline Package R-16A (SO-16)

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although

the ADP3158/ADP3178 feature proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions

are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P16

ADP3178JRZ-REEL7

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