5V49EE904NLGI Datasheet 5V49EE904NLGI, 5V49EE904NLGI8 | P25-P27

IDT5V49EE904

EEPROM PROGRAMMABLE CLOCK GENERATOR CLOCK SYNTHESIZER

IDT®

EEPROM PROGRAMMABLE CLOCK GENERATOR 25

IDT5V49EE904 REV Q 071015

Default Configuration: OUT1 = Reference Clock output, all other outputs turned off.

. Memory bytes do not exist. Readback will be last value in shift register. If reading sequentially, value in 0x51 will be

returned.

0xAC 00

TSSC[3:0]_CFG0 NSSC[3:0]_CFG0

PLL0 Spread Spectrum Control

0xAD 00

TSSC[3:0]_CFG1 NSSC[3:0]_CFG1

0xAE 00

TSSC[3:0]_CFG2 NSSC[3:0]_CFG2

0xAF 00

TSSC[3:0]_CFG3 NSSC[3:0]_CFG3

0xB0 00

TSSC[3:0]_CFG4 NSSC[3:0]_CFG4

0xB1 00

TSSC[3:0]_CFG5 NSSC[3:0]_CFG5

0xB2 00

DITH_CFG4 X2_CFG4 SSOFFSET[5:0]_CFG4

0xB3 00

DITH_CFG5 X2_CFG5 SSOFFSET[5:0]_CFG5

0xB4 00

DITH_CFG0 X2_CFG0 SSOFFSET[5:0]_CFG0

0xB5 00

DITH_CFG1 X2_CFG1 SSOFFSET[5:0]_CFG1

0xB6 00

DITH_CFG2 X2_CFG2 SSOFFSET[5:0]_CFG2

0xB7 00

DITH_CFG3 X2_CFG3 SSOFFSET[5:0]_CFG3

0xB8 11

SD1[3:0]_CFG0 SD0[3:0]_CFG0

0xB9 11

SD1[3:0]_CFG1 SD0[3:0]_CFG1

0xBA 11

SD1[3:0]_CFG2 SD0[3:0]_CFG2

0xBB 11

SD1[3:0]_CFG3 SD0[3:0]_CFG3

0xBC 11

SD1[3:0]_CFG4 SD0[3:0]_CFG4

0xBD 11

SD1[3:0]_CFG5 SD0[3:0]_CFG5

0xBE AE

SRC1[1:0]_CFG4 SRC0[1:0]_CFG4 PDPL3_CFG4 SM[1:0]_CFG4 PRIMSRC_CFG4

Output Divide Source Selection

0xBF AE

SRC1[1:0]_CFG5 SRC0[1:0]_CFG5 PDPL3_CFG5 SM[1:0]_CFG5 PRIMSRC_CFG5

PRIMSRC - primary source -

crystal or ICLOCK

0 = crystal

1 = CLKIN

0xC0 AE

SRC1[1:0]_CFG0 SRC0[1:0]_CFG0 PDPL3_CFG0 SM[1:0]_CFG0 PRIMSRC_CFG0

SM = switch mode

0x = manual

10 = reserved

11 = auto-revertive

0xC1 AE

SRC1[1:0]_CFG1 SRC0[1:0]_CFG1 PDPL3_CFG1 SM[1:0]_CFG1 PRIMSRC_CFG1

PDPL3 - PLL3 shutdown

0 = normal

1 = shut down

0xC2 AE

SRC1[1:0]_CFG2 SRC0[1:0]_CFG2 PDPL3_CFG2 SM[1:0]_CFG2 PRIMSRC_CFG2

SRC = MUX control bit prior to

DIV#

SRC0[1:0]

00 - DIV1

01 - DIV3

10 - Reference input

0xC3 AE

SRC1[1:0]_CFG3 SRC0[1:0]_CFG3 PDPL3_CFG3 SM[1:0]_CFG3 PRIMSRC_CFG3

0xC4 24

SRC4[0]_CFG0 SRC3[2:0]_CFG0 SRC2[2:0]_CFG0 SRC1[2]_CFG0

SRC1/SRC2/SRC3..SRC5

000 - DIV1

001 - DIV3

010 - Reference input

011 - Reserved

100 - PLL0

101 - PLL1

110 - PLL2

111 - PLL3

0xC5 24

SRC4[0]_CFG1 SRC3[2:0]_CFG1 SRC2[2:0]_CFG1 SRC1[2]_CFG1

0xC6 24

SRC4[0]_CFG2 SRC3[2:0]_CFG2 SRC2[2:0]_CFG2 SRC1[2]_CFG2

0xC7 24

SRC4[0]_CFG3 SRC3[2:0]_CFG3 SRC2[2:0]_CFG3 SRC1[2]_CFG3

0xC8 24

SRC4[0]_CFG4 SRC3[2:0]_CFG4 SRC2[2:0]_CFG4 SRC1[2]_CFG4

0xC9 24

SRC4[0]_CFG5 SRC3[2:0]_CFG5 SRC2[2:0]_CFG5 SRC1[2]_CFG5

0xCA 49

SRC6[2:0]_CFG4 SRC5[2:0]_CFG4 SRC4[2:1]_CFG4

SRC6

000 - Reserved

001 - Reserved

010 - Reference input

011 - Reserved

100 - Reserved

101 - PLL1

110 - Reserved

111 - Reserved

Quiet MUX

0xCB 49

SRC6[2:0]_CFG5 SRC5[2:0]_CFG5 SRC4[2:1]_CFG5

0xCC 49

SRC6[2:0]_CFG0 SRC5[2:0]_CFG0 SRC4[2:1]_CFG0

0xCD 49

SRC6[2:0]_CFG1 SRC5[2:0]_CFG1 SRC4[2:1]_CFG1

0xCE 49

SRC6[2:0]_CFG2 SRC5[2:0]_CFG2 SRC4[2:1]_CFG2

0xCF 49

SRC6[2:0]_CFG3 SRC5[2:0]_CFG3 SRC4[2:1]_CFG3

Addr

Default

Hex

Value

Bit #

Description

7654321 0

IDT5V49EE904

EEPROM PROGRAMMABLE CLOCK GENERATOR CLOCK SYNTHESIZER

IDT®

EEPROM PROGRAMMABLE CLOCK GENERATOR 26

IDT5V49EE904 REV Q 071015

Marking Diagram (NLG32)

Notes:

1. “#” is the lot number.

2. YYWW is the last two digits of the year and week that the part was assembled.

3. “$” is the assembly mark code.

4. “G” after the two-letter package code designates RoHS compliant package.

5. “I” at the end of part number indicates industrial temperature range.

Thermal Characteristics 32-pin VFQFPN

32-Pin QFN Landing Pattern

IDT

5V49EE904

NLGI

#YYWW$

Parameter Symbol Conditions Min. Typ. Max. Units

Thermal Resistance Junction to

Ambient



Still air 34 C/W



1 m/s air flow 29 C/W



3 m/s air flow 27 C/W

Thermal Resistance Junction to Case 

32 C/W

E2 AE ZE

0.28X(max)

0.69Yref

3.93G(min)

3.78A(max)

3.63E2/D2(max)

5.31Z(max)

Dimensions

0.28X(max)

0.69Yref

3.93G(min)

3.78A(max)

3.63E2/D2(max)

5.31Z(max)

Dimensions

Unit : mm

IDT5V49EE904

EEPROM PROGRAMMABLE CLOCK GENERATOR CLOCK SYNTHESIZER

IDT®

EEPROM PROGRAMMABLE CLOCK GENERATOR 27

IDT5V49EE904 REV Q 071015

Package Outline and Package Dimensions (32-pin VFQFPN, 0.50mm pitch)

Package dimensions are kept current with JEDEC Publication No. 95

Ordering Information

“G” after the two-letter package code are the Pb-Free configuration and are RoHS compliant.

While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes

no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No

other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications

such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not

recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT

does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.

Part / Order Number Marking Shipping Packaging Package Temperature

5V49EE904NLGI See Page 26 Trays 32-pin VFQFPN -40 to +85 C

5V49EE904NLGI8 See Page 26 Tape and Reel 32-pin VFQFPN -40 to +85 C

Thermal Base EP – exposed

thermal pad should be

externally connected to GND

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P29

5V49EE904NLGI

Mfr. #:

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Manufacturer:

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Description:

Clock Generators & Support Products EEPROM PROGRAMMABLE PLL

Lifecycle:

New from this manufacturer.

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