RT8070
7
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Switching
Time (500ns/Div)
V
IN
= 5V, V
OUT
= 1.1V, I
OUT
= 4A
V
LX
(5V/Div)
V
OUT
(10mV/Div)
Power On from EN
Time (500μs/Div)
V
EN
(5V/Div)
V
OUT
(1V/Div)
I
OUT
(5A/Div)
V
PGOOD
(5V/Div)
V
IN
= 5V, V
OUT
= 1.1V, I
OUT
= 4A
Power Off from EN
Time (250μs/Div)
V
EN
(5V/Div)
V
OUT
(1V/Div)
I
OUT
(5A/Div)
V
PGOOD
(5V/Div)
V
IN
= 5V, V
OUT
= 1.1V, I
OUT
= 4A
Load Transient Response
Time (100μs/Div)
V
IN
= 5V, V
OUT
= 1.1V, I
OUT
= 1A to 4A,
R
COMP
= 10kΩ, C
COMP
= 560pF
V
OUT
(200mV/Div)
I
OUT
(2A/Div)
Power Off from V
IN
Time (5ms/Div)
V
IN
(5V/Div)
V
OUT
(1V/Div)
I
OUT
(5A/Div)
V
PGOOD
(5V/Div)
V
IN
= 5V, V
OUT
= 1.1V, I
OUT
= 4A, EN = High
V
IN
(5V/Div)
V
OUT
(1V/Div)
I
OUT
(5A/Div)
V
PGOOD
(5V/Div)
Power On from V
IN
Time (2.5ms/Div)
V
IN
= 5V, V
OUT
= 1.1V, I
OUT
= 4A, EN = High
RT8070
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Application Information
The basic IC application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by C
IN
and C
OUT
.
Main Control Loop
During normal operation, the internal upper power switch
(P-MOSFET) is turned on at the beginning of each clock
cycle. Current in the inductor increases until the peak
inductor current reaches the value defined by the output
voltage (V
COMP
) of the error amplifier. The error amplifier
adjusts its output voltage by comparing the feedback signal
from a resistive voltage-divider on the FB pin with an
internal 0.8V reference. When the load current increases,
it causes a reduction in the feedback voltage relative to
the reference. The error amplifier increases its output
voltage until the average inductor current matches the new
load current. When the upper power MOSFET shuts off,
the lower synchronous power switch (N-MOSFET) turns
on until the beginning of the next clock cycle.
Output Voltage Setting
The output voltage is set by an external resistive voltage-
divider according to the following equation :
OUT REF
R1
V = V (1+)
R2
where V
REF
equals to 0.8V typical.
The resistive voltage-divider allows the FB pin to sense a
fraction of the output voltage as shown in Figure 1.
Figure 1. Setting the Output Voltage
Soft-Start
The IC contains an external soft-start clamp that gradually
raises the output voltage. The soft-start timing is
programmed by the external capacitor between SS pin
and GND. The chip provides an internal 10μA charge current
for the external capacitor. If 10nF capacitor is used to set
the soft-start, the period will be 800μs (typ.).
Power Good Output
The power good output is an open-drain output and requires
a pull up resistor. When the output voltage is 12.5% above
or 12.5% below its set voltage, PGOOD will be pulled
low. It is held low until the output voltage returns to within
the allowed tolerances once more. During soft-start,
PGOOD is actively held low and is only allowed to transition
high when soft-start is over and the output voltage reaches
87.5% of its set voltage.
Operating Frequency
Selection of the operating frequency is a tradeoff between
efficiency and component size. Higher frequency operation
allows the use of smaller inductor and capacitor values.
Lower frequency operation improves efficiency by reducing
internal gate charge and switching losses but requires
larger inductance and/or capacitance to maintain low output
ripple voltage.
The operating frequency of the IC is determined by an
external resistor , R
OSC
, that is connected between the
RT pin and ground. The value of the resistor sets the ramp
current that is used to charge and discharge an internal
timing capacitor within the oscillator. The practical switching
frequency ranges from 200kHz to 2MHz. However, when
the RT pin is floating, the internal frequency is set at 2MHz.
Determine the RT resistor value by examining the curve
below. Please notice the minimum on time is about 90ns.
R1
GND
RT8070
V
OUT
R2
FB
RT8070
9
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Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Figure 2. Switching Frequency vs. R
RT
Resistor
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current, DI
L
, increases with higher V
IN
and decreases
with higher inductance
OUT OUT
L
IN
VV
I = 1
fL V







Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. Highest efficiency operation is achieved by reducing
ripple current at low frequency, but attaining this goal
requires a large inductor.
For the ripple current selection, the value of ΔI
L
= 0.4(I
MAX
)
is a reasonable starting point. The largest ripple current
occurs at the highest V
IN
. To guarantee that the ripple
current stays below a specified maximum value, the
inductor value needs to be chosen according to the following
equation :
OUT OUT
L(MAX) IN(MAX)
VV
L = 1
fI V





Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input. At best, this ringing can couple to the output and
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause a
voltage spike at V
IN
large enough to damage the part.
Slope Compensation and Peak Inductor Current
Slope compensation provides stability in constant
frequency architectures by preventing sub- harmonic
oscillations at duty cycles greater than 50%. It is
accomplished internally by adding a compensating ramp
to the inductor current signal. Normally, the peak inductor
current is reduced when slope compensation is added.
For the IC, however, separated inductor current signal is
used to monitor over current condition, so the maximum
output current stays relatively constant regardless of the
duty cycle.
Hiccup Mode Under Voltage Protection
A Hiccup Mode Under Voltage Protection (UVP) function
is provided for the IC. When the FB voltage drops below
half of the feedback reference voltage, V
FB
, the UVP
function is triggered to auto soft-start the power stage
until this event is cleared. The Hiccup Mode UVP reduces
the input current in short circuit conditions, but will not be
triggered during soft-start process.
Under Voltage Lockout Threshold
The RT8070 includes an input under voltage lockout
protection (UVLO) function. If the input voltage exceeds
the UVLO rising threshold voltage, the converter will reset
and prepare the PWM for operation. However, if the input
voltage falls below the UVLO falling threshold voltage during
normal operation, the device will stop switching. The UVLO
rising and falling threshold voltage has a hysteresis to
prevent noise caused reset.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
Ω
0.0
0.4
0.8
1.2
1.6
2.0
2.4
0 300 600 900 1200 1500 1800 2100
R
RT
(k )
Switching Frequency (MHz) 1

RT8070ZSP

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IC REG BUCK ADJUSTABLE 4A 8SOP
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