1. General description
The PCA9544A is a 1-of-4 bidirectional translating multiplexer, controlled via the I
2
C-bus.
The SCL/SDA upstream pair fans out to four SCx/SDx downstream pairs, or channels.
Only one SCx/SDx channel is selected at a time, determined by the contents of the
programmable control register. Four interrupt inputs, INT0
to INT3, one for each of the
SCx/SDx downstream pairs, are provided. One interrupt output, INT
, which acts as an
AND of the four interrupt inputs, is provided.
A power-on reset function puts the registers in their default state and initializes the I
2
C-bus
state machine with no channels selected.
The pass gates of the multiplexer are constructed such that the V
DD
pin can be used to
limit the maximum high voltage which is passed by the PCA9544A. This allows the use of
different bus voltages on each SCx/SDx pair, so that 1.8 V, 2.5 V or 3.3 V parts can
communicate with 5 V parts without any additional protection. External pull-up resistors
pull the bus up to the desired voltage level for each channel. All I/O pins are 5 V tolerant.
2. Features and benefits
1-of-4 bidirectional translating multiplexer
I
2
C-bus interface logic; compatible with SMBus
4 active LOW interrupt inputs
Active LOW interrupt output
3 address pins allowing up to 8 devices on the I
2
C-bus
Channel selection via I
2
C-bus
Power-up with all multiplexer channels deselected
Low R
on
switches
Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
No glitch on power-up
Supports hot insertion
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant Inputs
0 Hz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Three packages offered: SO20, TSSOP20 and HVQFN20
PCA9544A
4-channel I
2
C-bus multiplexer with interrupt logic
Rev. 5 — 23 April 2014 Product data sheet
