IS31FL3726
Integrated Silicon Solution, Inc. — www.issi.com
Rev.B, 06/18/2013
9
SWITCHING CHARACTERISTICS
T
A
= 25°C, unless otherwise specified.
Symbol Characteristic Condition Min. Typ. Max. Unit
t
pLH1
Propagation delay
CLK-OUTn
——————
, L A T C H
————————
= “H”
ENABLE
—————————
= “L”
80 200
ns
t
pLH2
LATCH
————————
–OUTn
——————
, ENABLE
—————————
= “L”
80 200
t
pLH3
ENABLE
—————————
-OUTn
——————
, L A TC H
————————
= “H”
2000
t
pLH
CLK-SERIAL OUT 3 5
t
pHL1
CLK-OUTn
——————
, L A T C H
————————
= “H”
ENABLE
—————————
= “L”
160 250
t
pHL2
LATCH
————————
-OUTn
——————
, ENABLE
—————————
= “L”
160 250
t
pHL3
ENABLE
—————————
-OUTn
——————
, L A TC H
————————
= “H”
200 350
t
pLH
CLK-SERIAL OUT 4 6
t
or
Output rise time 10%~90% of voltage waveform 30 150 200 ns
t
of
Output fall time 90%~10% of voltage waveform 150 200 250 ns
t
r
Maximum CLOCK rise time
When not on PCB (Note)
5 us
t
f
Maximum CLOCK fall time 5 us
Conditions: (Refer to test circuit.)
Topr = 25°C, V
DD
=V
IH
=3.3V and 5V, V
OUT
= 0.7V, V
IL
=0V, R
EXT
=1000Ω, V
L
=3.0V, R
L
=60Ω, C
L
=10.5pF
Note:
1. If the device is connected in a cascade and tr/tf for the waveform is large, it may not be possible to achieve the timing required for data
transfer. Please consider the timings carefully.
2. Delay between outputs. The IS31FL3726 has graduated delay circuits between outputs. The fixed delay time is 5ns (typical), OUT1 has 5ns
delay, OUT2 has 10 ns delay, etc. This delay prevents large inrush currents, which reduce power supply bypass capacitor requirements when
the outputs turn on. The delay works during switch on and switch off of each output channel. LEDs that have not turned on before ENABLE
———————
is
low will still turn on and off at the determined delayed time regardless of the state of ENABLE
———————
. Therefore, every LED will be illuminated for the
amount of time ENABLE
———————
is pulled high.
Figure 4 Test Diagram
