I
NTEGRATED
C
IRCUITS
D
IVISION
CPC1466
10 www.ixysic.com R02
2. Functional Description
2.1 Introduction
The CPC1466 can be used for a number of DSL
designs requiring a DC-hold circuit such as ADSL
modem applications. Typical ADSL applications will
use a filter circuit design similar to the one shown in
Figure 9‚ “Typical ADSL/VDSL Application
Diagram” on page 9.
The DC Termination IC performs two fundamental
functions in an ADSL modem application; as an
electronic inductor providing a low impedance DC
termination with a high impedance ac termination and
second as part of the sealing current detection system
for automated line sensing. This function provides an
excellent method to monitor for the presence of
sealing current. Generally, loss of sealing current
indicates loop loss.
As can be seen in the application circuit in Figure 9
on page 9, CPC1466 designs require few external
components. For the CPC1466, all that is needed is a
circuit protector, two resistors and a capacitor. To
ensure DSL signal integrity over a wide variety of
conditions a POTS splitter type filter is recommended
to isolate the DSL traffic from the termination.
2.2 Surge Protection
Although the CPC1466 self-protects via current
limiting, it requires over-voltage surge protection to
protect against destructive over-voltage transients.
IXYS Integrated Circuits Division recommends the use
of a crowbar-type surge protector to limit the surge
voltage seen by the CPC1466 to less than 250 V. The
protection device must be able to withstand the surge
requirements specified by the appropriate governing
agency in regions where the product will be deployed.
Teccor, Inc. and Bourns, Inc. make suitable surge
protectors for most applications. Devices such as
Teccor’s P1800SD or P2000SD Sidactors and Bourns’
TISP4220H3BJ or TISP4240H3BJ thyristors should
provide suitable protection.
2.3 Bridge Rectifier
The bridge rectifier in the CPC1466 ensures that the
device is polarity-insensitive and provides consistent
operational characteristics if the TIP/RING circuit
polarity is reversed.
2.4 State Transitions
The DC TIP/RING voltage-current characteristics of
the CPC1466 are shown in Figure 2‚ “I-V
Requirements Template, 0 V to 50 V”, and in
Figure 3‚ “I-V Requirements Template, 0 V to
250 V” on page 5.
Transition timings are illustrated in Figure 6‚ “Applied
Waveform for Activation Test”, and in Figure 7‚
“Applied Waveform for Deactivation Test”. The
test configuration for these timings is given in
Figure 5‚ “Test Circuit for Activate and Deactivate
Times”. All timing figures are located on page 7.
State transition timings are set by the 1 F capacitor
connected between the TC and COM pins.
2.4.1 Activation - On-State
Application of battery voltage to the loop causes the
CPC1466 to conduct whenever the voltage exceeds
approximately 35 V. With application of sufficient
voltage applied across the TIP/RING terminals, the
CPC1466 will initially conduct a nominal 150 A of
sealing current for approximately 20 ms prior to
activation. Once activated, the CPC1466 will remain in
the on state for as long as the loop current exceeds a
nominal 0.5 mA.
The CPC1466 turn-on timing circuit assures device
activation will occur within 50 ms of an applied voltage
greater than 43.5 V but not within the first 3 ms.
2.4.2 Deactivation - Off-State
While the CPC1466 activation protocol is based on an
initial minimum voltage level, deactivation is based on
a diminished sealing current level. Deactivation occurs
when the nominal sealing current level drops below
0.5 mA with guaranteed deactivation occurring for
sealing current levels less than 0.1 mA
The turn-off timing circuit deactivates the sealing
current hold circuit when 1 mA of sealing current has
been removed for 100 ms but ignores periods of loss
up to 3 ms.
