PIC12LF1552
DS41642A-page 4 Preliminary 2012 Microchip Technology Inc.
3.1 User ID Location
A user may store identification information (user ID) in
four designated locations. The user ID locations are
mapped to 8000h-8003h. Each location is 14 bits in
length. Code protection has no effect on these memory
locations. Each location may be read with code
protection enabled or disabled.
3.2 Device ID
The device ID word is located at 8006h. This location is
read-only and cannot be erased or modified.
TABLE 3-1: DEVICE ID VALUES
3.3 Configuration Words
There are two Configuration Words, Configuration Word
1 (8007h) and Configuration Word 2 (8008h). The
individual bits within these Configuration Words are
used to enable or disable device functions such as the
Brown-out Reset, code protection and Power-up Timer.
3.4 Calibration Words
The internal calibration values are factory calibrated
and stored in Calibration Words 1 and 2 (8009h,
800Ah).
The Calibration Words do not participate in erase
operations. The device can be erased without affecting
the Calibration Words.
Note: MPLAB
®
IDE only displays the seven
Least Significant bits (LSb) of each user
ID location, the upper bits are not read. It
is recommended that only the seven LSbs
be used if MPLAB IDE is the primary tool
used to read these addresses.
REGISTER 3-1: DEVICE ID: DEVICE ID REGISTER
(1)
RRRRRR
DEV8 DEV7 DEV6 DEV5 DEV4 DEV3
bit 13 bit 8
RRRRRRRR
DEV2 DEV1 DEV0 REV4 REV3 REV2 REV1 REV0
bit 7
bit 0
Legend:
R = Readable bit ‘1’ = Bit is set ‘0’ = Bit is cleared
bit 13-5 DEV<8:0>: Device ID bits
These bits are used to identify the part number.
bit 4-0 REV<4:0>: Revision ID bits
These bits are used to identify the revision.
Note 1: This location cannot be written.
DEVICE
DEVICE ID VALUES
DEV REV
PIC12LF1552 0010 1011 110 x xxxx
2012 Microchip Technology Inc. Preliminary DS41642A-page 5
PIC12LF1552
REGISTER 3-2: CONFIGURATION WORD 1
U-1 U-1
R/P-1 R/P-1 R/P-1
U-1
(3)
CLKOUTEN BOREN<1:0>
bit 13 bit 8
R/P-1 R/P-1 R/P-1 R/P-1 R/P-1
U-1
R/P-1 R/P-1
CP
MCLRE PWRTE WDTE<1:0>
FOSC<1:0>
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘1’
‘0’ = Bit is cleared ‘1’ = Bit is set -n = Value when blank or after Bulk Erase
bit 13-12
Unimplemented: Read as ‘1
bit 11 CLKOUTEN: Clock Out Enable bit
1 = CLKOUT function is disabled. I/O or oscillator function on CLKOUT pin.
0 = CLKOUT function is enabled on CLKOUT pin
bit 10-9 BOREN<1:0>: Brown-out Reset Enable bits
(1)
When enabled, Brown-out Reset Voltage (VBOR) is set by the BORV bit of the Configuration Word 2 register.
11 = Brown-out Reset enabled. SPBOREN bit is ignored.
10 = Brown-out Reset enabled while running and disabled in Sleep. SBOREN bit is ignored.
01 = Brown-out Reset controlled by the SBOREN bit in the BORCON register
00 = Brown-out Reset disabled. SBOREN bit is ignored
bit 8
(3)
Unimplemented: Read as ‘1
bit 7 CP: Code Protection bit
(2)
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
bit 6 MCLRE: MCLR
/VPP Pin Function Select bit
If LVP bit =
1:
This bit is ignored.
If LVP bit =
0:
1 =MCLR
/VPP pin function is MCLR; Weak pull-up enabled.
0 =MCLR
/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of WPUA register.
bit 5 PWRTE
: Power-up Timer Enable bit
(1)
1 = PWRT disabled
0 = PWRT enabled
bit 4-3 WDTE<1:0>: Watchdog Timer Enable bit
11 = WDT enabled. SWDTEN is ignored.
10 = WDT enabled while running and disabled in Sleep. SWDTEN is ignored.
01 = WDT controlled by the SWDTEN bit in the WDTCON register
00 = WDT disabled. SWDTEN is ignored.
bit 2
Unimplemented: Read as ‘1
bit 1-0 FOSC<1:0>: Oscillator Selection bits
11 = ECH: External Clock, High-Power mode: on CLKIN pin
10 = ECM: External Clock, Medium-Power mode: on CLKIN pin
01 = ECL: External Clock, Low-Power mode: on CLKIN pin
00 = INTOSC oscillator: I/O function on OSC1 pin
Note 1: Enabling Brown-out Reset does not automatically enable Power-up Timer.
2: The entire program memory will be erased when the code protection is turned off.
3: This bit should be maintained as ‘1’ when programmed.
PIC12LF1552
DS41642A-page 6 Preliminary 2012 Microchip Technology Inc.
REGISTER 3-3: CONFIGURATION WORD 2
R/P-1 U-1 R/P-1 R/P-1 R/P-1 U-1
LVP
—LPBOR BORV STVREN
bit 13 bit 8
U-1 U-1 U-1 U-1 U-1 U-1 R/P-1 R/P-1
—WRT<1:0>
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘1’
‘0’ = Bit is cleared 1’ = Bit is set -n = Value when blank or after Bulk Erase
bit 13 LVP: Low-Voltage Programming Enable bit
(1)
1 = Low-voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE Configuration bit is ignored.
0 = HV on MCLR
/VPP must be used for programming.
bit 12 Unimplemented: Read as ‘1
bit 11 L
PBOR: Low-Power BOR bit
1 = Low-Power BOR is disabled
0 = Low-Power BOR is enabled
bit 10 BORV: Brown-out Reset Voltage Selection bit
1 = Brown-out Reset Voltage (V
BOR) set to 1.9V
0 = Brown-out Reset Voltage (V
BOR) set to 2.7V
bit 9 STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Stack Overflow or Underflow will cause a Reset
0 = Stack Overflow or Underflow will not cause a Reset
bit 8-2 Unimplemented: Read as ‘1
bit 1-0 WRT<1:0>: Flash Memory Self-Write Protection bits
11 = Write protection off
10 = 000h to 1FFh write-protected, 200h to 7FFh may be modified by PMCON control
01 = 000h to 3FFh write-protected, 400h to 7FFh may be modified by PMCON control
00 = 000h to 7FFh write-protected, no addresses may be modified by PMCON control
Note 1: The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP.

PIC12LF1552-I/P

Mfr. #:
Manufacturer:
Microchip Technology
Description:
8-bit Microcontrollers - MCU 3.5KBFlash 256bRAM 6 I/0, 10-Bit ADC
Lifecycle:
New from this manufacturer.
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