Data Sheet ADG5412W
Rev. A | Page 9 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 2. TSSOP Pin Configuration
Figure 3. LFCSP Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
TSSOP LFCSP Mnemonic Description
1 15 IN1 Logic Control Input 1.
2 16 D1 Drain Terminal 1. This pin can be an input or output.
3 1 S1 Source Terminal 1. This pin can be an input or output.
4 2 V
SS
Most Negative Power Supply Potential.
5 3 GND Ground (0 V) Reference.
6 4 S4 Source Terminal 4. This pin can be an input or output.
7 5 D4 Drain Terminal 4. This pin can be an input or output.
8 6 IN4 Logic Control Input 4.
9 7 IN3 Logic Control Input 3.
10 8 D3 Drain Terminal 3. This pin can be an input or output.
11 9 S3 Source Terminal 3. This pin can be an input or output.
12 10 NC No Connection.
13 11 V
DD
Most Positive Power Supply Potential.
14 12 S2 Source Terminal 2. This pin can be an input or output.
15 13 D2 Drain Terminal 2. This pin can be an input or output.
16 14 IN2 Logic Control Input 2.
EP Exposed Pad
The exposed pad is connected internally. For increased reliability of the solder joints
and maximum thermal capability, it is recommended that the pad be soldered to the
substrate, V
SS
.
Table 8. ADG5412W Truth Table
INx Switch Condition
1 On
0 Off
11695-002
IN1
D1
S1
V
SS
IN2
D2
S2
V
DD
GND
NC
S4
S3
D4 D3
IN4
IN3
ADG5412W
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NOTES
1. NC = NO CONNECT.
11695-003
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD IS CONNECTED INTERNALLY.
FOR INCREASED RELIABILITY OF THE SOLDER
JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS
RECOMMENDED THAT THE PAD BE SOLDERED TO
THE SUBSTRATE, V
SS
.
12
11
10
1
3
4
9
2
6
5
7
8
16
15
14
13
S1
GND
S4
S2
D2
IN2
IN1
D1
NC
S3
D4
IN4
IN3
D3
V
SS
V
DD
ADG5412W
TOP VIEW
(Not to Scale)