MT41K512M16TNA-125:E

TwinDie 1.35V DDR3L SDRAM
MT41K512M16 – 32 Meg x 16 x 8 Banks x 2 Ranks
Description
The 8Gb (TwinDie) 1.35V DDR3L SDRAM is a low-
voltage version of the 1.5V DDR3 SDRAM device. It
uses two Micron 4Gb DDR3L SDRAM x16 die for es-
sentially two ranks of 4Gb DDR3L SDRAM. Unless sta-
ted otherwise, the DDR3L meets the functional and
timing specifications listed in the equivalent-density
DDR3 SDRAM data sheets. Refer to Micron’s 4Gb
DDR3 SDRAM data sheet for the specifications not in-
cluded in this document. Specifications for base part
number MT41K256M16 (monolithic) correlate to
manufacturing part number MT41K512M16.
Features
Uses two 4Gb x16 Micron die in one package
Two ranks (includes dual CS#, ODT, CKE, and ZQ
balls)
V
DD
= V
DDQ
= 1.35V (1.283–1.425V); backward com-
patible to 1.5V operation
1.35V center-terminated push/pull I/O
JEDEC-standard ballout
Low-profile package
T
C
of 0°C to 95°C
0°C to 85°C: 8192 refresh cycles in 64ms
85°C to 95°C: 8192 refresh cycles in 32ms
Options Marking
Configuration
32 Meg x 16 x 8 banks x 2 ranks 512M16
FBGA package (Pb-free)
96-ball FBGA
(10mm x 14mm x 1.2mm)
TNA
Timing – cycle time
1
1.071ns @ CL = 13 (DDR3L-1866) -107
1.25ns @ CL = 11 (DDR3L-1600) -125
1.5ns @ CL = 9 (DDR3L-1333) -15E
1.87ns @ CL = 7 (DDR3L-1066) -187E
Operating temperature
Commercial (0°C T
C
95°C) None
Industrial (-40°C T
C
95°C) IT
Revision :E
Note:
1. CL = CAS (READ) latency.
Table 1: Key Timing Parameters
Speed Grade Data Rate (MT/s) Target
t
RCD-
t
RP-CL
t
RCD (ns)
t
RP (ns) CL (ns)
-107
1, 2,3
1866 13-13-13 13.91 13.91 13.91
-125
1, 2
1600 11-11-11 13.75 13.75 13.75
-15E
1
1333 9-9-9 13.5 13.5 13.5
-187E 1066 7-7-7 13.1 13.1 13.1
Notes:
1. Backward compatible to 1066, CL = 7 (-187E).
2. Backward compatible to 1333, CL = 9 (-15E).
3. Backward compatible to 1600, CL = 11 (-125).
8Gb: x16 TwinDie DDR3L SDRAM
Description
PDF: 09005aef84ccb467
DDR3L_8Gb_x16_2CS_TwinDie.pdf - Rev. D 10/13 EN
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
Table 2: Addressing
Parameter 512 Meg x 16
Configuration 32 Meg x 16 x 8 banks x 2 ranks
Refresh count 8K
Row address 32K A[14:0]
Bank address 8 BA[2:0]
Column address 1K A[9:0]
Page size 2KB
FBGA Part Marking Decoder
Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the
part number. Micron’s FBGA part marking decoder is available at www.micron.com/decoder.
8Gb: x16 TwinDie DDR3L SDRAM
Description
PDF: 09005aef84ccb467
DDR3L_8Gb_x16_2CS_TwinDie.pdf - Rev. D 10/13 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.
Ball Assignments and Descriptions
Figure 1: 96-Ball FBGA – x16 (Top View)
Note:
1. Dark balls (with rings) designate balls that differ from the monolithic versions.
8Gb: x16 TwinDie DDR3L SDRAM
Ball Assignments and Descriptions
PDF: 09005aef84ccb467
DDR3L_8Gb_x16_2CS_TwinDie.pdf - Rev. D 10/13 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.

MT41K512M16TNA-125:E

Mfr. #:
Manufacturer:
Micron
Description:
IC DRAM 8G PARALLEL 96FBGA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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