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LTC4268IDKD-1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P46
LTC4268-1
4
42681fc
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
R
INPUT_SHDN
Shutdown Input Resistance With Respect to V
PORTN
l
100
kW
V
IH_ILIM
I
LIM_EN
High Level Input Voltage With Respect to V
PORTN
(Note 13)
High Level Enables Current Limit
l
4 V
V
IL_ILIM
I
LIM_EN
Low Level Input Voltage With Respect to V
PORTN
(Note 13)
l
1 V
I
VPORTN
V
PORTN
Supply Current V
PORTN
= –54V
l
3 mA
I
IN_CLASS
IC Supply Current During Classification V
PORTN
= –17.5V, V
NEG
Tied to V
PORTP
(Note 14)
l
0.55 0.62 0.70 mA
DI
CLASS
Current Accuracy During Classification 10mA < I
CLASS
< 75mA
–12.5V ≤ V
PORTN
≤ –21V (Notes 15, 16)
l
±3.5 %
R
SIGNATURE
Signature Resistance –1.5V ≤ V
PORTN
≤ –10.1V, SHDN Tied
to V
PORTN
, IEEE 802.3af Tw o -Point
Measurement (Notes 8, 9)
l
23.25 26
kW
R
INVALID
Invalid Signature Resistance –1.5V ≤ V
PORTN
≤ –10.1V, SHDN Tied
to V
PORTP
, IEEE 802.3af Tw o -Point
Measurement (Notes 8, 9)
10 11.8
kW
V
PWRGD_OUT
Active Low Power Good Output Voltage I = 1mA, V
PORTN
= –54V, PWRGD
Referenced to V
PORTN
l
0.5 V
I
PWRGD_LEAK
Active Low Power Good Output Leakage V
PORT
= 0V, V
PWRGD
= 57V
l
1 µA
V
PWRGD_OUT
Active High Power Good Output Voltage I = 0.5mA, V
PORTN
= –52V, V
NEG
= –4V
PWRGD Referenced to V
NEG
(Note 17)
l
0.35 V
V
PWRGD_VCLAMP
Active High Power Good Voltage
Limiting Clamp
I = 2mA, V
NEG
= 0V, PWRGD Referenced
to V
NEG
(Note 3)
l
12 14 16.5 V
I
PWRGD_LEAK
Active High Power Good Output Leakage V
PWRGD
= 11V With Respect to V
NEG
,
V
NEG
= V
PORTN
= –54V
l
1 µA
R
ON
On-Resistance I = 700mA, V
PORTN
= –48V, Measured
from V
PORTN
to V
NEG
(Note 16)
l
0.5 0.6
0.8
W
W
I
OUT_LEAK
V
OUT
Leakage V
PORTN
= –57V, V
PORTP
= SHDN = V
NEG
=
0V (Note 15)
l
1 µA
I
LIM_HI
Input Current Limit, High Level V
PORTN
= –54V, V
NEG
= –53V I
LIM_EN
Floating (Notes 18, 19)
l
700 750 800 mA
I
LIM_LO
Input Current Limit, Low Level V
PORTN
= –54V, V
NEG
= –53V
(Notes 18, 19)
l
250 300 350 mA
I
LIM_DISA
Safeguard Current Limit When I
LIM
is
Disabled
V
PORTN
= –54V,
V
NEG
= –52.5V I
LIM_EN
Tied to V
PORTN
(Notes 18, 19, 20)
1.2 1.45 1.65 A
f
OSC
Oscillator Frequency C
OSC
= 100pF
l
84 100 110 kHz
C
OSC
Oscillator Capacitor Value (Note 21) 33 200 pF
t
ON(MIN)
Minimum Switch on Time 200 ns
t
ENDLY
Flyback Enable Delay Time 265 ns
t
PGDLY
PG Turn-On Delay Time 200 ns
DC
ON(MAX)
Maximum Switch Duty Cycle
l
85 88 %
V
SYNC
SYNC Pin Threshold
l
1.53 2.1 V
R
SYNC
SYNC Pin Input Resistance 40
kW
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 14V, SG open, V
CMP
= 1.5V, V
SENSE
= 0V, R
CMP
= 1k, R
tON
= 90k,
R
PGDLY
= 27.4k, R
ENDLY
= 90k, unless otherwise specified.
42681fc
LTC4268-1
5
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
LCOMP
Feedback Pin Load Compensation
Current
V
RCMP
With V
SENSE
+
= 0V 20 µA
V
LCOMP
Load Comp to V
SENSE
Offset Voltage V
SENSE+
= 20mV, V
FB
= 1.23V 1 mV
V
UVLO
UVLO Pin Threshold
l
1.215 1.237 1.265 V
I
UVLOL
I
UVLOH
UVLO Pin Bias Current V
UVLO
= 1.2V
V
UVLO
= 1.3V
–0.25
–4.50
0
–3.4
0.25
–2.5
µA
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltages are with respect to V
PORTP
pin unless otherwise noted.
Note 3: Active High PWRGD internal clamp circuit self-regulates to 14V
with respect to V
NEG
. V
CC
has internal 20V clamp with respect to GND.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 5: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
DIS
according to the formula:
T
J
= T
A
+ (P
DIS
• 49°C/W)
Note 6: The LTC4268-1 operates with a negative supply voltage in the
range of –1.5V to –57V.
To avoid confusion, voltages in this data sheet
are referred to in terms of absolute magnitude. Terms such as “maximum
negative voltage” refer to the largest negative voltage and a “rising
negative voltage” refers to a voltage that is becoming more negative.
Note 7: In IEEE 802.3af systems, the maximum voltage at the PD jack is
defined to be –57V.
Note 8: The LTC4268-1 is designed to work with two polarity protection
diodes in series with the input. Parameter ranges specified in the Electrical
Characteristics are with respect to LTC4268-1 pins and are designed to
meet IEEE 802.3af specifications when the drop from the two diodes is
included. See Applications Information.
Note 9: Signature resistance is measured via the two-point DV/DI method
as defined by IEEE 802.3af. The LTC4268-1 signature resistance is offset
from 25k to account for diode resistance. With two series diodes, the total
PD resistance will be between 23.75k and 26.25k and meet IEEE 802.3af
specifications. The minimum probe voltages measured at the LTC4268-1
pins are –1.5V and –2.5V. The maximum probe voltages are –9.1V and
–10.1V.
Note 10: The LTC4268-1 includes hysteresis in the UVLO voltages
to
preclude any start-up oscillation. Per IEEE 802.3af requirements, the
LTC4268-1
will power up from a voltage source with 20Ω series resistance
on the first trial.
Note 11: Supply current does not include gate charge current to the
MOSFETs. See Application Information.
Note 12: To disable the 25k signature, tie SHDN to V
PORTP
(±0.1V) or hold
SHDN high with respect to V
IN
. See Applications Information.
Note13: I
LIM_EN
pin is pulled high internally and for normal operation
should be left floating. To disable current limit, tie I
LIM_EN
to V
IN
. See
Applications Information.
Note 14: I
IN_CLASS
does not include classification current programmed at
Pin 3. Total supply current in classification mode will be I
IN_CLASS
+ I
CLASS
(See Note 15).
Note 15: I
CLASS
is the measured current flowing through R
CLASS
. ∆I
CLASS
accuracy is with respect to the ideal current defined as I
CLASS
= 1.237/
R
CLASS
. T
CLASSRDY
is the time for I
CLASS
to settle to within ±3.5% of ideal.
The current accuracy specification does not include variations in R
CLASS
resistance. The total classification current for a PD also includes the IC
quiescent current (I
IN_CLASS
). See Applications Information.
Note 16: This parameter is assured by design and wafer level testing.
Note 17:
Active high power good is referenced to V
NEG
and is valid for
V
PORTP
– V
NEG
≥ 4V.
Note 18: The LTC4268-1 includes a dual current limit. At turn on, before
C1 is charged, the LTC4268-1 current level is set to I
LIMIT_LOW
. After C1 is
charged and with I
LIM_EN
floating, the LTC4268-1 switches to I
LIMIT_HIGH
.
With I
LIM_EN
pin tied low, the LTC4268-1 switches to I
LIMIT_DISA
. The
LTC4268-1 stays in I
LIMIT_HIGH
or I
LIMIT_DISA
until the input voltage drops
below the UVLO turn-off threshold or a thermal overload occurs.
Note 19: The LTC4268-1 features thermal overload protection. In the event
of an over temperature condition, the LTC4268-1 will turn off the power
MOSFET, disable the classification load current, and present an invalid
power good signal. Once the LTC4268-1 cools below the over temperature
limit, the LTC4268-1 current limit switches to I
LIMIT_LOW
and normal
operation resumes.
Note 20: I
LIMIT_DISA
is a safeguard current limit that is activated when the
normal input current limit (I
LIMIT_HIGH
) is defeated using the I
LIM_EN
pin.
Currents at or near I
LIMIT_DISA
will cause significant package heating and
may require a reduced maximum ambient operating temperature in order
to avoid tripping the thermal overload protection.
Note 21: Component value range guaranteed by design.
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 14V, SG open, V
CMP
= 1.5V, V
SENSE
= 0V, R
CMP
= 1k, R
tON
= 90k,
R
PGDLY
= 27.4k, R
ENDLY
= 90k, unless otherwise specified.
LTC4268-1
6
42681fc
INPUT VOLTAGE (V)
0
0
INPUT CURRENT (mA)
0.1
0.2
0.3
0.4
0.5
–2
–4 –6 –8
42681 G01
–10
T
A
= 25°C
INPUT VOLTAGE (V)
0
0
INPUT CURRENT (mA)
20
40
60
80
100
–10
–20 –30
*OPTIONAL CLASS 5 CURRENT
–40
42681 G02
–50 –60
T
A
= 25°C
CLASS 5*
CLASS 4
CLASS 3
CLASS 2
CLASS 1
CLASS 0
INPUT VOLTAGE (V)
–12
9.0
INPUT CURRENT (mA)
9.5
10.5
11.0
11.5
–14
–16
42681 G03
10.0
–18
–20 –22
12.0
85°C
–40°C
CLASS 1 OPERATION
INPUT VOLTAGE (V)
–1
22
V1:
V2:
SIGNATURE RESISTANCE (kΩ)
23
25
26
27
–3
–5
42681 G04
24
–7
–9
–6 –10
–2 –4
–8
28
RESISTANCE =
DIODES: DF1501S
T
A
= 25°C
=
∆V
∆I
V2 – V1
I
2
– I
1
IEEE UPPER LIMIT
IEEE LOWER LIMIT
LTC4268-1 + 2 DIODES
LTC4268-1 ONLY
INPUT
VOLTAGE
10V/DIV
CLASS
CURRENT
20mA/DIV
TIME (10µs/DIV)
42681 G05
T
A
= 25°C
JUNCTION TEMPERATURE (°C)
–50
0
RESISTANCE (Ω)
0.2
0.4
0.6
0.8
1.0
–25
0 25 50
42681 G06
75 100
INPUT CURRENT (mA)
0
V
PWRGD_OUT
– V
PORTN
(V)
2
3
8
42681 G07
1
0
2
4
6
10
4
T
A
= 25°C
INPUT CURRENT (mA)
0
0
PWRGD – V
NEG
(V)
0.4
1.0
0.5
1
42681 G08
0.2
0.8
0.6
1.5
2
T
A
= 25°C
GND – V
NEG
= 4V
INPUT VOLTAGE (V)
–40
200
CURRENT LIMIT (mA)
400
600
800
–40°C
–40°C
85°C
85°C
–45 –50
42681 G09
–55 –60
HIGH CURRENT MODE
LOW CURRENT MODE
Typical perForMance characTerisTics
Input Current vs Input Voltage
25k Detection Range
Input Current vs Input Voltage
Input Current vs Input Voltage
Signature Resistance
vs Input Voltage
Class Operation vs Time
On Resistance vs Temperature
Active Low PWRGD: Output Low
Voltage vs Current
Active High PWRGD: Output Low
Voltage vs Current
Current Limit vs Input Voltage
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P46

LTC4268IDKD-1

Mfr. #:
Buy LTC4268IDKD-1
Manufacturer:
Analog Devices / Linear Technology
Description:
Power Switch ICs - POE / LAN LTC4268-1 - High Power PD with Synchronous NoOpto Flyback Controller
Lifecycle:
New from this manufacturer.
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