LTC3827
10
3827ff
FUNCTIONAL DIAGRAM
SHDN
SWITCH
LOGIC
+
4.7V
V
IN
V
IN
INTV
CC
-0.5V
0.8V
FC
BURSTEN
CLK2
CLK1
+
+
+
+
INTERNAL
SUPPLY
R
LP
C
LP
PLLIN/MODE
EXTV
CC
INTV
CC
SGND
+
5.25V/
7.5V
LDO
SW
25, 16
SHDN
SLEEP
0.4V
TOP
BOOST
24, 17
TG
26, 15
C
B
C
IN
D
D
B
PGND
BOT
BG
23, 18
INTV
CC
INTV
CC
V
IN
C
OUT
V
OUT
3827 FD
R
SENSE
R
B
V
FB
31, 11
DROP
OUT
DET
FOLDBACK
BOT
TOP ON
S
R
Q
Q
OSCILLATOR
PHASE DET
PLLLPF
PLLIN/MODE
FC
BURSTEN
EA
0.88V
0.80V
TRACK/SS
OV
V
FB
0.5µA
1µA
6V
R
A
+
R
C
2(V
FB
)
RST
SHDN
TRACK/SS
29, 13
I
TH
30,12
C
C
C
C2
C
SS
2(V
FB
)
0.45V
SLOPE
COMP
6mV
+
+
SENSE
1, 9
SENSE
+
32, 10
ICMP IR
B
RUN
7, 8
DUPLICATE FOR SECOND
CONTROLLER CHANNEL
+ +
PHASMD
CLKOUT
F
IN
+
+
+
+
PGOOD1
PGOOD2
V
FB1
V
FB2
0.88V
0.72V
0.88V
0.72V
L
FOLDDIS
5
3
2
4
27
28
22
21
20
19
14
6, 33
100k
LTC3827
11
3827ff
OPERATION
Each top MOSFET driver is biased from the fl oating boot-
strap capacitor, C
B
, which normally recharges during each
off cycle through an external diode when the top MOSFET
turns off. If the input voltage V
IN
decreases to a voltage
close to V
OUT
, the loop may enter dropout and attempt
to turn on the top MOSFET continuously. The dropout
detector detects this and forces the top MOSFET off for
about one twelfth of the clock period every tenth cycle to
allow C
B
to recharge.
Shutdown and Start-Up (RUN1, RUN2 and
TRACK/SS1, TRACK/SS2 Pins)
The two channels of the LTC3827 can be independently
shut down using the RUN1 and RUN2 pins. Pulling either
of these pins below 0.7V shuts down the main control
loop for that controller. Pulling both pins low disables
both controllers and most internal circuits, including the
INTV
CC
regulator, and the LTC3827 draws only 8µA of
quiescent current.
Releasing either RUN pin allows an internal 0.5µA current
to pull up the pin and enable that controller. Alternatively,
the RUN pin may be externally pulled up or driven directly
by logic. Be careful not to exceed the Absolute Maximum
rating of 7V on this pin.
The start-up of each controllers output voltage V
OUT
is
controlled by the voltage on the TRACK/SS1 and TRACK/
SS2 pin. When the voltage on the TRACK/SS pin is less
than the 0.8V internal reference, the LTC3827 regulates
the V
FB
voltage to the TRACK/SS pin voltage instead of the
0.8V reference. This allows the TRACK/SS pin to be used
to program a soft-start by connecting an external capacitor
from the TRACK/SS pin to SGND. An internal 1µA pull-up
current charges this capacitor creating a voltage ramp on
the TRACK/SS pin. As the TRACK/SS voltage rises linearly
from 0V to 0.8V (and beyond), the output voltage V
OUT
rises smoothly from zero to its fi nal value.
Alternatively the TRACK/SS pin can be used to cause the
start-up of V
OUT
to “track” that of another supply. Typi-
cally, this requires connecting to the TRACK/SS pin an
(Refer to Functional Diagram)
Main Control Loop
The LTC3827 uses a constant frequency, current mode
step-down architecture with the two controller channels
operating 180 degrees out of phase. During normal op-
eration, each external top MOSFET is turned on when the
clock for that channel sets the RS latch, and is turned off
when the main current comparator, I
CMP
, resets the RS
latch. The peak inductor current at which I
CMP
trips and
resets the latch is controlled by the voltage on the I
TH
pin,
which is the output of the error amplifi er EA. The error
amplifi er compares the output voltage feedback signal at
the V
FB
pin, (which is generated with an external resis-
tor divider connected across the output voltage, V
OUT
, to
ground) to the internal 0.800V reference voltage. When the
load current increases, it causes a slight decrease in V
FB
relative to the reference, which causes the EA to increase
the I
TH
voltage until the average inductor current matches
the new load current.
After the top MOSFET is turned off each cycle, the bottom
MOSFET is turned on until either the inductor current starts
to reverse, as indicated by the current comparator IR, or
the beginning of the next clock cycle.
INTV
CC
/EXTV
CC
Power
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTV
CC
pin.
When the EXTV
CC
pin is left open or tied to a voltage less
than 4.7V, an internal 5.25V low dropout linear regulator
supplies INTV
CC
power from V
IN
. If EXTV
CC
is taken above
4.7V, the 5.25V regulator is turned off and a 7.5V low
dropout linear regulator is enabled that supplies INTV
CC
power from EXTV
CC
. If EXTV
CC
is less than 7.5V (but
greater than 4.7V), the 7.5V regulator is in dropout and
INTV
CC
is approximately equal to EXTV
CC
. When EXTV
CC
is greater than 7.5V (up to an absolute maximum rating
of 10V), INTV
CC
is regulated to 7.5V. Using the EXTV
CC
pin allows the INTV
CC
power to be derived from a high
effi ciency external source such as one of the LTC3827
switching regulator outputs.
LTC3827
12
3827ff
OPERATION
external resistor divider from the other supply to ground
(see Applications Information section).
When the corresponding RUN pin is pulled low to disable
a controller, or when V
IN
drops below its undervoltage
lockout threshold of 3.5V, the TRACK/SS pin is pulled low
by an internal MOSFET. When in undervoltage lockout,
both controllers are disabled and the external MOSFETs
are held off.
Light Load Current Operation (Burst Mode Operation,
Pulse Skipping or Continuous Conduction)
(PLLIN/MODE Pin)
The LTC3827 can be enabled to enter high effi ciency Burst
Mode operation, constant frequency pulse skipping mode,
or forced continuous conduction mode at low load cur-
rents. To select Burst Mode operation, tie the PLLIN/MODE
pin to a DC voltage below 0.7V (e.g., SGND). To select
forced continuous operation, tie the PLLIN/MODE pin to
INTV
CC
. To select pulse-skipping mode, tie the PLLIN/
MODE pin to a DC voltage greater than 0.9V and less than
INTV
CC
– 1.2V.
When a controller is enabled for Burst Mode operation,
the peak current in the inductor is set to approximately
one-tenth of the maximum sense voltage even though the
voltage on the I
TH
pin indicates a lower value. If the aver-
age inductor current is lower than the load current, the
error amplifi er EA will decrease the voltage on the I
TH
pin.
When the I
TH
voltage drops below 0.4V, the internal sleep
signal goes high (enabling “sleep” mode) and both external
MOSFETs are turned off. The I
TH
pin is then disconnected
from the output of the EA and “parked” at 0.425V.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC3827 draws.
If one channel is shut down and the other channel is in
sleep mode, the LTC3827 draws only 80µA of quiescent
current. If both channels are in sleep mode, the LTC3827
draws only 115µA of quiescent current. In sleep mode,
the load current is supplied by the output capacitor. As
the output voltage decreases, the EAs output begins to
rise. When the output voltage drops enough, the I
TH
pin
is reconnected to the output of the EA, the sleep signal
goes low, and the controller resumes normal operation
by turning on the top external MOSFET on the next cycle
of the internal oscillator.
When a controller is enabled for Burst Mode operation,
the inductor current is not allowed to reverse. The reverse
current comparator (IR) turns off the bottom external
MOSFET just before the inductor current reaches zero,
preventing it from reversing and going negative. Thus, the
controller operates in discontinuous operation.
In forced continuous operation, the inductor current is
allowed to reverse at light loads or under large transient
conditions. The peak inductor current is determined by
the voltage on the I
TH
pin, just as in normal operation.
In this mode, the effi ciency at light loads is lower than
in Burst Mode operation. However, continuous has the
advantages of lower output ripple and less interference
to audio circuitry. In forced continuous mode, the output
ripple is independent of load current.
When the PLLIN/MODE pin is connected for pulse skipping
mode or clocked by an external clock source to use the
phase-locked loop (see Frequency Selection and Phase-
Locked Loop section), the LTC3827 operates in PWM
pulse skipping mode at light loads. In this mode, constant
frequency operation is maintained down to approximately
1% of designed maximum output current. At very light
loads, the current comparator I
CMP
may remain tripped for
several cycles and force the external top MOSFET to stay
off for the same number of cycles (i.e., skipping pulses).
The inductor current is not allowed to reverse (discon-
tinuous operation). This mode, like forced continuous
operation, exhibits low output ripple as well as low audio
noise and reduced RF interference as compared to Burst
Mode operation. It provides higher low current effi ciency
than forced continuous mode, but not nearly as high as
Burst Mode operation.
Frequency Selection and Phase-Locked Loop (PLLLPF
and PLLIN/MODE Pins)
The selection of switching frequency is a tradeoff between
effi ciency and component size. Low frequency opera-
tion increases effi ciency by reducing MOSFET switching
(Refer to Functional Diagram)

LTC3827IUH#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators L IQ, 2x, 2-PhSync Buck Cntr
Lifecycle:
New from this manufacturer.
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