LTC3827
22
3827ff
APPLICATIONS INFORMATION
Topside MOSFET Driver Supply (C
B
, D
B
)
External bootstrap capacitors, C
B
, connected to the BOOST
pins supply the gate drive voltages for the topside MOSFETs.
Capacitor C
B
in the Functional Diagram is charged though
external diode D
B
from INTV
CC
when the SW pin is low.
When one of the topside MOSFETs is to be turned on, the
driver places the C
B
voltage across the gate-source of the
desired MOSFET. This enhances the MOSFET and turns on
the topside switch. The switch node voltage, SW, rises to
V
IN
and the BOOST pin follows. With the topside MOSFET
on, the boost voltage is above the input supply: V
BOOST
= V
IN
+ V
INTVCC
. The value of the boost capacitor, C
B
,
needs to be 100 times that of the total input capacitance
of the topside MOSFET(s). The reverse breakdown of the
external Schottky diode must be greater than V
IN(MAX)
.
When adjusting the gate drive level, the fi nal arbiter is the
total input current for the regulator. If a change is made
and the input current decreases, then the effi ciency has
improved. If there is no change in input current, then there
is no change in effi ciency.
Fault Conditions: Current Limit and Current Foldback
The LTC3827 includes current foldback to help limit load
current when the output is shorted to ground. If the output
falls below 70% of its nominal output level, then the maxi-
mum sense voltage is progressively lowered from 100mV
to 30mV. Under short-circuit conditions with very low duty
cycles, the LTC3827 will begin cycle skipping in order to
limit the short-circuit current. In this situation the bottom
MOSFET will be dissipating most of the power but less
than in normal operation. The short-circuit ripple current
is determined by the minimum on-time, t
ON(MIN)
,
of the
LTC3827 (≈180ns), the input voltage and inductor value:
ΔI
L(SC)
= t
ON(MIN)
(V
IN
/L)
The resulting short-circuit current is:
I
SC
=
30mV
R
SENSE
1
2
ΔI
L(SC)
Fault Conditions: Overvoltage Protection (Crowbar)
The overvoltage crowbar is designed to blow a system
input fuse when the output voltage of the regulator rises
much higher than nominal levels. The crowbar causes huge
currents to fl ow, that blow the fuse to protect against a
shorted top MOSFET if the short occurs while the controller
is operating.
A comparator monitors the output for overvoltage con-
ditions. The comparator (OV) detects overvoltage faults
greater than 10% above the nominal output voltage. When
this condition is sensed, the top MOSFET is turned off and
the bottom MOSFET is turned on until the overvoltage
condition is cleared. The bottom MOSFET remains on
continuously for as long as the OV condition persists; if
V
OUT
returns to a safe level, normal operation automati-
cally resumes. A shorted top MOSFET will result in a high
current condition which will open the system fuse. The
switching regulator will regulate properly with a leaky
top MOSFET by altering the duty cycle to accommodate
the leakage.
Phase-Locked Loop and Frequency Synchronization
The LTC3827 has a phase-locked loop (PLL) comprised of
an internal voltage-controlled oscillator (VCO) and a phase
detector. This allows the turn-on of the top MOSFET of
controller 1 to be locked to the rising edge of an external
clock signal applied to the
PLLIN/MODE
pin. The turn-on
of controller 2’s top MOSFET is thus 180 degrees out of
phase with the external clock. The phase detector is an
edge sensitive digital type that provides zero degrees
phase shift between the external and internal oscillators.
This type of phase detector does not exhibit false lock to
harmonics of the external clock.
The output of the phase detector is a pair of comple-
mentary current sources that charge or discharge the
external fi lter network connected to the PLLLPF pin. The
relationship between the voltage on the PLLLPF pin and
operating frequency, when there is a clock signal applied
LTC3827
23
3827ff
Figure 9. Relationship Between Oscillator Frequency and Voltage
at the PLLLPF Pin When Synchronizing to an External Clock
PLLLPF PIN VOLTAGE (V)
0
FREQUENCY (kHz)
0.5 1 1.5 2
3827 F09
2.5
0
100
300
400
500
900
800
700
200
600
APPLICATIONS INFORMATION
to PLLIN/MODE, is shown in Figure 9 and specifi ed in the
Electrical Characteristics table. Note that the LTC3827 can
only be synchronized to an external clock whose frequency
is within range of the LTC3827’s internal VCO, which is
nominally 115kHz to 800kHz. This is guaranteed to be
between 140kHz and 650kHz. A simplifi ed block diagram
is shown in Figure 10.
If the external clock frequency is greater than the internal
oscillators frequency, f
OSC
, then current is sourced con-
tinuously from the phase detector output, pulling up the
PLLLPF pin. When the external clock frequency is less
than f
OSC
, current is sunk continuously, pulling down
the PLLLPF pin. If the external and internal frequencies
are the same but exhibit a phase difference, the current
sources turn on for an amount of time corresponding to
the phase difference. The voltage on the PLLLPF pin is
adjusted until the phase and frequency of the internal and
external oscillators are identical. At the stable operating
point, the phase detector output is high impedance and
the fi lter capacitor, C
LP
, holds the voltage.
The loop fi lter components, C
LP
and R
LP
, smooth out the
current pulses from the phase detector and provide a
stable input to the voltage-controlled oscillator. The fi lter
components C
LP
and R
LP
determine how fast the loop
acquires lock. Typically R
LP
= 10k and C
LP
is 2200pF to
0.01µF.
Typically, the external clock (on PLLIN/MODE pin) input high
threshold is 1.6V, while the input low threshold is 1.2V.
Table 2 summarizes the different states in which the
PLLLPF pin can be used.
Table 2
PLLLPF PIN PLLIN/MODE PIN FREQUENCY
0V DC Voltage 250kHz
Floating DC Voltage 400kHz
INTV
CC
DC Voltage 530kHz
RC Loop Filter Clock Signal Phase-Locked to External Clock
Minimum On-Time Considerations
Minimum on-time, t
ON(MIN)
, is the smallest time duration
that the LTC3827 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that
t
ON(MIN)
<
V
OUT
V
IN
(f)
Figure 10. Phase-Locked Loop Block Diagram
DIGITAL
PHASE/
FREQUENCY
DETECTOR
OSCILLATOR
2.4V
R
LP
C
LP
3827 F10
PLLLPF
EXTERNAL
OSCILLATOR
PLLIN/
MODE
LTC3827
24
3827ff
APPLICATIONS INFORMATION
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for the LTC3827 is approximately
180ns. However, as the peak sense voltage decreases
the minimum on-time gradually increases up to about
200ns. This is of particular concern in forced continuous
applications with low ripple current at light loads. If the
duty cycle drops below the minimum on-time limit in this
situation, a signifi cant amount of cycle skipping can occur
with correspondingly larger current and voltage ripple.
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Percent effi ciency can
be expressed as:
%Effi ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3827 circuits: 1) IC V
IN
current, 2) INTV
CC
regulator current, 3) I
2
R losses, 4) Topside MOSFET
transition losses.
1. The V
IN
current has two components: the fi rst is the
DC supply current given in the Electrical Characteristics
table, which excludes MOSFET driver and control cur-
rents; the second is the current drawn from the 3.3V
linear regulator output. V
IN
current typically results in
a small (<0.1%) loss.
2. INTV
CC
current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTV
CC
to ground. The resulting dQ/dt is a cur-
rent out of INTV
CC
that is typically much larger than the
control circuit current. In continuous mode, I
GATECHG
= f(Q
T
+ Q
B
), where Q
T
and Q
B
are the gate charges of
the topside and bottom side MOSFETs.
Supplying INTV
CC
power through the EXTV
CC
switch
input from an output-derived source will scale the V
IN
current required for the driver and control circuits by
a factor of (Duty Cycle)/(Effi ciency). For example, in a
20V to 5V application, 10mA of INTV
CC
current results
in approximately 2.5mA of V
IN
current. This reduces the
mid-current loss from 10% or more (if the driver was
powered directly from V
IN
) to only a few percent.
3. I
2
R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resis-
tor, and input and output capacitor ESR. In continuous
mode the average output current fl ows through L and
R
SENSE
, but is “chopped” between the topside MOSFET
and the synchronous MOSFET. If the two MOSFETs have
approximately the same R
DS(ON)
, then the resistance
of one MOSFET can simply be summed with the resis-
tances of L, R
SENSE
and ESR to obtain I
2
R losses. For
example, if each R
DS(ON)
= 30m, R
L
= 50m, R
SENSE
= 10m and R
ESR
= 40m (sum of both input and
output capacitance losses), then the total resistance
is 130m. This results in losses ranging from 3% to
13% as the output current increases from 1A to 5A for
a 5V output, or a 4% to 20% loss for a 3.3V output.
Effi ciency varies as the inverse square of V
OUT
for the
same external components and output power level. The
combined effects of increasingly lower output voltages
and higher currents required by high performance digital
systems is not doubling but quadrupling the importance
of loss terms in the switching regulator system!

LTC3827IUH#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators L IQ, 2x, 2-PhSync Buck Cntr
Lifecycle:
New from this manufacturer.
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