OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

NCP51199PDR2G

P1-P3P4-P6P7-P8
© Semiconductor Components Industries, LLC, 2017
April, 2017 − Rev. 3
1 Publication Order Number:
NCP51199/D
NCP51199, NCV51199
DDR 2-Amp Source / Sink
V
TT
Termination Regulator
The NCP/NCV51199 is a linear regulator designed to supply a
regulated V
TT
termination voltage for DDR−2 and DDR−3 memory
applications. The regulator is capable of actively sourcing and sinking
±2 A peak currents for DDR−2, and DDR−3 up to ±1.5 A while
regulating the V
TT
output voltage to within ±10 mV. The output
termination voltage is regulated to track V
DDQ
/ 2 by two external
voltage divider resistors connected to the PV
CC
, GND, and V
REF
pins.
The NCP/NCV51199 incorporates a high−speed differential
amplifier to provide ultra−fast response to line and load transients.
Other features include source/sink current limiting, soft−start and
on−chip thermal shutdown protection.
Features
• Supports DDR−2 V
TT
Termination to ±2 A, DDR−3 to ±1.5 A (peak)
• Stable with 10 mF Ceramic Capacitance on V
TT
Output
• Integrated Power MOSFETs
• High Accuracy V
TT
Output at Full−Load
• Fast Transient Response
• Built−in Soft−Start
• Shutdown for Standby or Suspend Mode
• Integrated Thermal and Current−Limit Protection
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• SDRAM Termination Voltage for DDR−2 / DDR−3
• Motherboard, Notebook, and VGA Card Memory Termination
• Set Top Box, Digital TV, Printers
MARKING
DIAGRAM
www.
onsemi.com
SOIC8−NB EP
PD SUFFIX
CASE 751BU
NCV
TT
18
NC
VREF
V
CC
GND
NCPVCC
PIN CONNECTION
XXXXXX = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
SOIC−8 EP
1
8
XXXXXX
ALYW
G
1
8
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
NCP51199, NCV51199
www.onsemi.com
2
C1 = 1 mF (Low ESR) C4 = 1000 mF + 10 mF (10 mF ceramic)
C2 = 470 mF (Low ESR) R3 = Optional V
TT
discharge resistor
C3 = 47 mF N−ch MOSFET = Optional Enable / Disable
Figure 1. Application Diagram
NCP51199
PV
CC
GND
V
REF
V
CC
V
TT
C2
1
2
3
6
4
C4
C3
5 V
R3
C1
R1
100k
R2
100k
Enable
PV
CC
= 1.5 to 5.0 V*
*For DDR2: PV
CC
= 1.8 V, V
TT
= 0.9 V
DDR3: PV
CC
= 1.5 V, V
TT
= 0.75 V
V
TT
= 0.75 to 2.5 V*
PIN FUNCTION DESCRIPTION
Pin No. Pin Name Description
1 PV
CC
Input voltage which supplies current to the output pin. C
IN
= 470 mF with low ESR.
2 GND Common Ground
3 V
REF
Buffered reference voltage input equal to ½ of V
DDQ
and active low shutdown pin. An external resistor
divider dividing down the PV
CC
voltage creates the regulated output voltage. Pulling the pin to ground
(0.15 V maximum) turns the device off.
4 V
TT
Regulator output voltage capable of sourcing and sinking current while regulating the output rail.
C
OUT
= 1000 mF + 10 mF ceramic with low ESR.
5 NC True No Connect
6 V
CC
The V
CC
pin is a 5 V input pin that provides internal bias to the controller. PV
CC
should always be kept
lower or equal to V
CC
.
7 NC True No Connect
8 NC True No Connect
EP Thermal Pad Pad for thermal connection. The exposed pad must be connected to the ground plane using multiple
vias for maximum power dissipation performance.
NCP51199, NCV51199
www.onsemi.com
3
ABSOLUTE MAXIMUM RATINGS
Rating Symbol Value Unit
Input Supply Voltage Range (V
cc
w PV
CC
) (Note 1) PV
CC
,
V
CC
−0.3 to 6 V
Output Voltage Range V
TT
−0.3 to 6 V
Reference Input Range V
REF
−0.3 to 6 V
Maximum Junction Temperature T
J(max)
125 °C
Storage Temperature Range TSTG −65 to 150 °C
ESD Capability, Human Body Model (Note 2) ESDHBM 2 kV
ESD Capability, Machine Model (Note 2) ESDMM 150 V
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions (Note 3)
T
SLD
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating: ≤150 mA per JEDEC standard: JESD78
3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Thermal Characteristics, SO8−EP (Note 4)
Thermal Resistance, Junction−to−Air (Note 5)
Power Rating at 25°C Ambient = 1.19 W, derate 12 mW/°C
Thermal Reference, Junction−to−Lead2 (Note 5)
R
q
JA
R
Y
JL
84
20
°C/W
4. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
5. Values based on copper area of 645 mm
2
(or 1 in
2
) of 1 oz copper thickness and FR4 PCB substrate.
OPERATING RANGES (Note 6)
Rating
Symbol Min Max Unit
Input Voltage PV
CC
1.5 5.5 V
Bias Supply Voltage V
CC
4.75 5.25 V
Ambient Temperature T
A
−40 85 °C
Junction Temperature T
J
−40 125 °C
6. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
P1-P3P4-P6P7-P8

NCP51199PDR2G

Mfr. #:
Buy NCP51199PDR2G
Manufacturer:
ON Semiconductor
Description:
Linear Voltage Regulators DDR 2Amp Source Sink VTT Termination Reg
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet