REV. 0
ADM1022
–8–
If ADD is left open-circuit the default address will be 0101100.
The facility to make hardwired changes to A1 and A0 allows the
user to avoid conflicts with other devices sharing the same serial
bus; for example, if more than one ADM1022 is used in a system.
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a START
condition, defined as a high-to-low transition on the serial
data line SDA while the serial clock line SCL remains high.
This indicates that an address/data stream will follow. All
slave peripherals connected to the serial bus respond to the
START condition, and shift in the next eight bits, consisting
of a 7-bit address (MSB first) plus an R/W bit, which deter-
mines the direction of the data transfer, i.e., whether data
will be written to or read from the slave device.
The peripheral whose address corresponds to the transmitted
address responds by pulling the data line low during the low
period before the ninth clock pulse, known as the Acknowl-
edge Bit. All other devices on the bus now remain idle while
the selected device waits for data to be read from or written
to it. If the R/W bit is a 0, the master will write to the slave
device. If the R/W bit is a one, the master will read from the
slave device.
2. Data is sent over the serial bus in sequences of nine clock
pulses, eight bits of data followed by an Acknowledge Bit
from the slave device. Transitions on the data line must
occur during the low period of the clock signal and remain
stable during the high period, as a low-to-high transition when
the clock is high may be interpreted as a STOP signal. The
number of data bytes that can be transmitted over the serial
bus in a single READ or WRITE operation is limited only by
what the master and slave devices can handle.
3. When all data bytes have been read or written, stop conditions
are established. In WRITE mode, the master will pull the
data line high during the 10th clock pulse to assert a STOP
condition. In READ mode, the master device will override
the acknowledge bit by pulling the data line high during the
low period before the 9th clock pulse. This is known as No
Acknowledge. The master will then take the data line low
during the low period before the 10th clock pulse, then high
during the 10th clock pulse to assert a STOP condition.
Any number of bytes of data may be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation, because the type of operation is determined at
the beginning and cannot subsequently be changed without
starting a new operation.
In the case of the ADM1022, write operations contain either
one or two bytes, and read operations contain one byte, and
perform the following functions:
To write data to one of the device data registers or read data
from it, the Address Pointer Register must be set so that the
correct data register is addressed, then data can be written into
that register or read from it. The first byte of a write operation
always contains an address that is stored in the Address Pointer
Register. If data is to be written to the device, then the write
operation contains a second data byte that is written to the reg-
ister selected by the address pointer register.
This is illustrated in Figure 11a. The device address is sent over
the bus followed by R/W set to 0. This is followed by two data
bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the Address Pointer
Register. The second data byte is the data to be written to the
internal data register.
When reading data from a register there are two possibilities:
1. If the ADM1022’s Address Pointer Register value is unknown
or not the desired value, it is first necessary to set it to the cor-
rect value before data can be read from the desired data register.
This is done by performing a write to the ADM1022 as before,
but only the data byte containing the register address is sent,
as data is not to be written to the register. This is shown in
Figure 11b.
A read operation is then performed consisting of the serial bus
address, R/W bit set to 1, followed by the data byte read from
the data register. This is shown in Figure 11c.
2. If the Address Pointer Register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the Address Pointer Reg-
ister, so Figure 11b can be omitted.
NOTES
1. Although it is possible to read a data byte from a data register
without first writing to the Address Pointer Register, if the
Address Pointer Register is already at the correct value, it is
not possible to write data to a register without writing to the
Address Pointer Register, because the first data byte of a
write is always written to the Address Pointer Register.
2. In Figures 11a to 11c, the serial bus address is shown as the
default value 01011(A1)(A0), where A1 and A0 are set by
the three-state ADD pin.
3. The ADM1022 also supports the Read Byte protocol, as
described in the System Management Bus specification.
