MT90863 Data Sheet
10
Zarlink Semiconductor Inc.
1.0 Device Overview
The Rate conversion Switch (MT90863) can switch up to 2,048 512 channels while also providing a rate
conversion capability. It is designed to switch 64 kb/s PCM or N X 64 kb/s data between the backplane and local
interfaces. When the device is in the sub-rate switching mode, 2-bit wide 16 kb/s data channels can be switched
within the device. The device maintains frame integrity in data applications and minimum throughput delay for voice
application on a per channel basis.
The backplane interface can operate at 2.048, 4.096 or 8.192 Mb/s, arranged in 125 s wide frames that contain
32, 64 or 128 channels, respectively. A built-in rate conversion circuit allows users to interface between backplane
interface and the local interface which operates at 2.048 Mb/s or 8.192 Mb/s.
By using Zarlink’s message mode capability, the microprocessor can access input and output time-slots on a per
channel basis. This feature is useful for transferring control and status information for external circuits or other ST-
BUS devices.
The frame offset calibration function allows users to measure the frame offset delay for streams STio0 to STio23.
The offset calibration is activated by a frame evaluation bit in the frame evaluation register. The evaluation result is
stored in the frame evaluation registers and can be used to program the input offset delay for individual streams
using internal frame input offset registers.
63 L11 STi12 Serial Input Streams 12 (5 V Tolerant Input): In 2 Mb/s mode, this
input accepts data rate of 2.048 Mb/s with 32 channels per stream
respectively. In Sub-rate Switching mode, this pin accepts 2.048 Mb/s
with 128 channels per stream for Sub-rate switching application.
64-66 M12, M13, L12 STi13 - 15 Serial Input Streams 13 to 15 (5 V Tolerant Inputs): In 2 Mb/s mode,
these inputs accept a data rate of 2.048 Mb/s with 32 channels per
stream.
69 L13 ODE Output Drive Enable (5 V Tolerant Input): This is the output enable
control for the STo0 to STo15 serial outputs and STio0 to STio31 serial
bidirectional outputs.
70-73 K13, K12, J13,
J12
STo0 - 3 Serial Output Streams 0 to 3 (5 V Tolerant Three-state Outputs): In
2 Mb/s or Sub-rate Switching mode, these outputs have data rates of
2.048 Mb/s with 32 channels per stream respectively. In 8 Mb/s mode,
these outputs have data rates of 8.192 Mb/s with 128 channels per
stream
74-77,
80-83
H11, H13, H12,
G13, G12, F13,
F12, E13
STo4 - 7,
STo8 - 11
Serial Output Streams 4 to 11 (5 V Tolerant Three-state Outputs):
In 2 Mb/s or Sub-rate Switching mode, these outputs have data rates
of 2.048 Mb/s with 32 channels per stream
84 E12 STo12 Serial Output Streams 12 (5 V Tolerant Three-state Output): In
2 Mb/s mode, this output has data rate of 2.048 Mb/s with 32 channels
per stream. In Sub-rate Switching mode, this pin has data rate of
2.048 Mb/s with 128 channels per stream for Sub-rate switching
application.
85-87 D13, E11, C13 STo13 - 15 Serial Output Streams 13 to 15 (5 V Tolerant Three-state Outputs):
In 2 Mb/s mode, these outputs have a data rate of 2.048 Mb/s with 32
channels per stream.
Pin Description (continued)
128 MQFP
Pin#
144 BGA
Pin#
Name Description
MT90863 Data Sheet
11
Zarlink Semiconductor Inc.
2.0 Functional Description
A functional Block Diagram of the MT90863 is shown in Figure 1. One end of the MT90863 is used to interface with
backplane applications, such as HMVIP or H.100 environments, while the other end supports the local switching
environments.
2.1 Frame Alignment Timing
The Device Mode Selection (DMS) register allows users to select three different frame alignment timing modes. In
ST-BUS modes, the master clock (C16i
) is always at 16.384 MHz. The frame pulse (F0i) input accepts a negative
frame pulse at 8 kHz. The frame pulse goes low at the frame boundary for 61 ns. The frame pulse output F0o
provides a 244 ns wide negative frame pulse and the C4o output provides a 4.094 MHz clock. These two signals
are used to support local switching applications. See Figure 4 for the ST-BUS timings.
In CT Bus mode, the C4i
/C8i pin accepts 8.192 MHz clock for the CT Bus frame pulse alignment. The F0i is the CT
bus frame pulse input. The CT frame pulse goes low at the frame boundary for 122 ns. See Figure 5 for the CT Bus
timing.
In HMVIP mode, the C4i
/C8i pin accepts 4.096 MHz clock for the HMVIP frame pulse alignment. The F0i is the
HMVIP frame pulse input. The HMVIP frame pulse goes low at the frame boundary for 244 ns. See Figure 6 for the
HMVIP timing.
Table 1 - describes the input timing requirements for ST-BUS, CT Bus and HMVIP modes.
3.0 Switching Configuration
The device has four operation modes for the backplane interface and three operation modes for the local interface.
These modes can be programmed via the Device Mode Selection (DMS) register. Mode selections between the
backplane and local interfaces are independent. See Table 2 and Table 3 for the selection of various operation
modes via the programming of the DMS register.
3.1 Backplane Interface
The backplane interface can be programmed to accept data streams of 2 Mb/s, 4 Mb/s or 8 Mb/s. When 2 Mb/s
mode is enabled, STio0 to STio31 have a data rate of 2.048 Mb/s. When 4 Mb/s mode is enabled, STio0 to STio31
have a data rate of 4.096 Mb/s. When 8 Mb/s mode is enabled, STio0 to STio15 have a data rate of 8.192 Mb/s.
When HMVIP mode is enabled, STio0 to STio15 have a data rate of 2.048 Mb/s and STio16 to STio23 have a data
rate of 8.192 Mb/s. Table 2 describes the data rates and mode selection for the backplane interface.
MT90863 Data Sheet
12
Zarlink Semiconductor Inc.
Figure 4 - ST-BUS Timing for 2, 4 and 8 Mb/s Data Streams
Figure 5 - CT Bus Mode Timing for 2, 4 and 8 Mb/s Data Streams
F0i
C16i
72345610
0
STio 0 - 15
STi/STo 0 - 15
(8Mb/s mode)
1
2345610
7
Channel 127
Channel 0
0
76
7
0
1
Channel 31
Channel 0
(2Mb/s mode)
F0o
C4o
01 0
STi12/STo12
(Sub-rate
Bit 101
Channel 127
Channel 0
Switching)
STi/STo 0 - 3
7564
0
STio 0 - 31
(4Mb/s mode)
12307
Channel 63
Channel 0
STio 0 - 31
F0i
C4i/C8i
F0o
C4o
C16i
(8.192MHz)
(CT_FRAME)
72345610
0
STio 0 - 15
STi/STo 0 - 15
(8Mb/s mode)
1
2345610
7
Channel 127
Channel 0
0
76
7
0
1
Channel 31
Channel 0
(2Mb/s mode)
01 0
STi12/STo12
(Sub-rate
Bit 101
Channel 127
Channel 0
Switching)
STi/STo 0 - 3
7564
0
STio 0 - 31
(4Mb/s mode)
12307
Channel 63
Channel 0
STio 0 - 31

MT90863AL1

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Digital Bus Switch ICs Pb Free RATE CONVERSION DIGITAL SWITCH
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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