Electrical specification TDA7565
8/19 Doc ID 9800 Rev 5
I
2
C bus interface
f
SCL
Clock frequency - - - 400 KHz
V
IL
Input low voltage - - - 1.5 V
V
IH
Input high voltage - 2.3 - - V
V
Min(pin27)
Mute in threshold voltage Amp. mute - - 1.5 V
V
Mout(pin27)
Mute out threshold voltage - 3.5 - - V
A
M(pin 27)
Mute attenuation - 80 90 - -
Voltage converter
V
cc1
,
V
cc2
Converter output voltage
(VC = ON)
V
S
= 14 V
D3 (IB2) = 0; D6 (IB2) = 0
D3 (IB2) = 1; D6 (IB2) = 0
D3 (IB2) = 0; D6 (IB2) = 1
D3 (IB2) = 1; D6 (IB2) = 1
-
15
16.5
17.5
18.5
-V
F
s
Voltage converter switching
frequency
D6 (IB1) = 0; D7 (IB1) = 0
D6 (IB1) = 1; D7 (IB1) = 0
D6 (IB1) = 0; D7 (IB1) = 1
D6 (IB1) = 1; D7 (IB1) = 1
90
135
230
360
-
120
175
300
470
kHz
V
mgl
MOS gate output low voltage I
o
= 200 mA - 1 2 V
V
mgh
MOS gate output high voltage
I
o
= 20 mA - 11 - V
I
o
= 200 mA - 9.5 - V
V
mgclamp
MOS gate output clamp voltage I
o
= 5 mA - 11.5 - V
t
f
Fall time C
o
= 1 nF - 20 - ns
t
r
Rise time C
o
= 1 nF - 50 - ns
V
mgl
(VC
off
)
MOS gate output voltage with
voltage converter disabled
I
o
= 5 mA - - 0.5 V
1. Saturated square wave output.
Table 4. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
