NCP1030, NCP1031
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16
D1
D2
COUT
CAUX1
Cin
R3
R4
CCT
CC
RC
CP
R1
R2
NCP1032
VDRAIN
VCC
OV
COMP
VFB
GND
CT
UV
Lsec
Lbias
Lpri
NCP1030/31
CVCC
RC
D2
CAUX2
Figure 39. Typical Application with the Series
Resistance Added to Control VCC
To reduce the problem, a series resistance can be added to
allow the part to clamp VCC with the characteristic current
draw of the regulator as the voltage increases. The resistor
value required is such that it will not implead normal
operation but will prevent damage to the device during
transients, startup, current limits, and over loads. The proper
sizing of the series resistance starts with an examination of
the current draw by the NCP1031 at the desired operating
frequency as shown in Figure 40. The resistor value should
be such that it does not exceed the VCC maximum voltage
of 16 V during the worst case overshoot. Further, the voltage
must not fall below the VCC minimum operating voltage of
7 V during heavy loading, transients, or line disturbances. A
series resistance calculated example of operation at 310 kHz
is shown in Equation 2. In this case, a 1.96 kW resistor can
be used to make the VCC node more robust.
Calculation of RC
16 V w V
OUTaux
* I
C_current
@ RC w 7.0 V
(eq. 2)
V
OUTaux
* 16 V
I
C_current
+ RC
24 V * 16 V
4.075 mA
+ 1.96 kW
12.5 V * 7.0 V
2.65 mA
+ 2.07 kW
Figure 40. NCP1031 Current Draw vs. Frequency and VCC Voltage
2
3
4
5
6
7
8
9
10
11
7
8
9
10
11
12
13
14
15
16
17
18
VCC Current Draw (mA)
VCC Voltage (V)
560 pF 310kHz
470 pF 350kHz
390 pF 390kHz
330 pF 450kHz
270 pF 500kHz
220 pF 573kHz
180 pF 635 kHz
150 pF 702kHz
100 pF 905kHz
82 pF 1MHz
The series resistor needs to be coupled with proper sizing
of the auxiliary winding and VCC capacitance. The CAUX1
and CAUX2 should be approximately the same size where
the CVCC should be between 1/10 to 1/100 the value of
CAUX2. The smaller size of CVCC serves to reduce the
amount of energy available to the internal clamping
structures in the event of a large unforeseen over voltage.
Proper sizing of capacitance and adding a series resistance
can reduce the likelihood of an over voltage on the VCC, but
cannot eliminate the possibility completely. A zener diode
can be added along with the series resistance value
calculated from Equation 2 which can be split into RC1 and
RC2 as shown in Figure 41. If the OV pin is not used, it can
be connected to the VCC node to monitor the voltage and
suspend switching if the voltage exceeds a predefined level.
The addition of the ROV1 and ROV2 will add a current draw
from VAUX and will increase the voltage drop across RC.
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17
Figure 41. Zener Clamp or OV Protection
D2
CAUX1
VCC
GND
Lbias
NCP1030/31
CVCC
RC1
D2
CAUX2
RC2
D2
CAUX1
VCC
GND
Lbias
NCP1030/31
CVCC
RC
D2
CAUX2
OV
ROV1
ROV2
The compensation of the NCP1031/30 should be
completed with the loop response, the transient response,
and the amplifier in mind. The amplifier can source 110 mA
and sink 550 mA typical. Internally the current sink that pulls
down the amplifier has an on resistance of 2.45 kW and an
ESD resistance of 1.74 kW as shown in Figure 42. The two
resistances combine to create a maximum pull down current
that changes with comp voltage as shown in Figure 43 and
Figure 44.
Figure 42. Internal Error Amplifier Structure
R1
VOUT
R3
C2
Rf
R2
C1
2.5V
C3
COMP
FB
RESD
1.74 kW
2.45 kW
PWM
COMP
EA
5V Rail
5V Rail
Figure 43. Sink Current vs. Comp Voltage
SINK CURRENT (mA)
57547537527517575−25
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
COMP VOLTAGE (V)
Figure 44. Amplifier Sink Current with Comp at Steady Voltage vs Feedback Voltage
-200
-100
0
100
200
300
400
500
600
700
2.45
2.46
2.47
2.48
2.49
2.5
2.51
2.52
2.53
2.54
2.55
2.56
2.57
2.58
2.59
2.6
Amplifier Current (uA)
VFB(V)
4.5V
3.5V
2.5V
1.5V
1.0V
0.5V
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18
One source of overshoot in the system can occur during
startup where the reference voltage starts at 2.5 V and the
system PWM regulates to the desired output voltage. The
power is limited to the system by the internally set current
limit. Since the voltage feedback loop sees the output
voltage is lower than it should be, the COMP voltage slews
up to increase the duty cycle, but the duty cycle is controlled
by the pulse by pulse current limit. Once regulated output
voltage is reached, the current loop will maintain control for
the time it takes the COMP pin to slew from 5 V to 3.25 V
where the voltage loop takes control and the pulse by pulse
current limit is no longer limiting the system. The same is
true for an overload or current limit. If the COMP voltage
has reached a steady state value of 5 V, the required
compensation value needed to slew from 5 V to 3.25 V is
shown in Equation 3. Equation 3 is true if the feedback node
has very low impedance at 2.5 V. For comparison, the decay
from 5 V to 3.25 V in network A occurs in 259 ns and
network B occurs in 12.2 ms although they have a very
similar frequency response.
RC1 +
V
COMP_INIT
* V
COMP_FINAL
I
PULL_DOWN
(eq. 3)
3.5 kW +
5V* 3.25 V
500 mA
Time + CP @
V
COMP_INIT
* V
COMP_FINAL
I
PULL_DOWN
300 ns + 100 pF @
5V* 3.25 V
500 mA
COMP
VFB
GND
CC
820 pF
RC1
432 W
CP
18 nF
R1
R2
NCP1030/31
VAUX
B
COMP
VFB
GND
CC
22 nF
RC1
2.5 kW
CP
100 pF
R1
R2
VAUX
A
CF
1.5 nF
RF
215 W
Figure 45. Compensation for Good Transient Response
NCP1030/31
When considering compensation and overshoot, the
designer should follow a few rules for a better result.
1. If the current flowing through R1 and R2 is 10X
larger than 620 mA then the RF and CF
contribution to the large signal is small.
a.) If RF is small (1 W -100 W) there is only a
small DC shift from RC1.
b.) To create a large DC shift down, increase
RF (1 kW -10 kW).
2. Keep CP small (CP < 1 nF) or it will slow the
large signal response of the converter.
3. CF should be less than 22 nF.
4. RC1 should be 2.7 k < RC1 < 100 k.

NCP1031DR2

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC CTRLR PWM OTP OVD HV 8SOIC
Lifecycle:
New from this manufacturer.
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