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PCF85102C-2P/03,11

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
Philips Semiconductors
PCF85102C-2
256 × 8-bit CMOS EEPROM with I
2
C-bus interface
Product data Rev. 04 — 22 October 2004 13 of 20
9397 750 14216
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
13. Package outline
Fig 10. DIP8 package outline (SOT97-1).
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
SOT97-1
99-12-27
03-02-13
UNIT
A
max.
12
b
1
(1) (1)
(1)
b
2
cD E e M
Z
H
L
mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
min.
A
max.
b
max.
w
M
E
e
1
1.73
1.14
0.53
0.38
0.36
0.23
9.8
9.2
6.48
6.20
3.60
3.05
0.2542.54 7.62
8.25
7.80
10.0
8.3
1.154.2 0.51 3.2
inches
0.068
0.045
0.021
0.015
0.014
0.009
1.07
0.89
0.042
0.035
0.39
0.36
0.26
0.24
0.14
0.12
0.010.1 0.3
0.32
0.31
0.39
0.33
0.0450.17 0.02 0.13
b
2
050G01 MO-001 SC-504-8
M
H
c
(e )
1
M
E
A
L
seating plane
A
1
w M
b
1
e
D
A
2
Z
8
1
5
4
b
E
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
pin 1 index
DIP8: plastic dual in-line package; 8 leads (300 mil)
SOT97-1
Philips Semiconductors
PCF85102C-2
256 × 8-bit CMOS EEPROM with I
2
C-bus interface
Product data Rev. 04 — 22 October 2004 14 of 20
9397 750 14216
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(2)
(1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
0.7
0.6
0.7
0.3
8
0
o
o
0.25 0.10.25
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
1.0
0.4
SOT96-1
X
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v M
A
(A )
3
A
4
5
pin 1 index
1
8
y
076E03 MS-012
0.069
0.010
0.004
0.057
0.049
0.01
0.019
0.014
0.0100
0.0075
0.20
0.19
0.16
0.15
0.05
0.244
0.228
0.028
0.024
0.028
0.012
0.010.010.041 0.004
0.039
0.016
0 2.5 5 mm
scale
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
99-12-27
03-02-18
Fig 11. SO8 package outline (SOT96-1).
Philips Semiconductors
PCF85102C-2
256 × 8-bit CMOS EEPROM with I
2
C-bus interface
Product data Rev. 04 — 22 October 2004 15 of 20
9397 750 14216
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
14. Soldering
14.1 Introduction
This text gives a very brief insight to a complex technology. A more in-depth account
of soldering ICs can be found in our
Data Handbook IC26; Integrated Circuit
Packages
(document order number 9398 652 90011).
There is no soldering method that is ideal for all IC packages. Wave soldering is often
preferred when through-hole and surface mount components are mixed on one
printed-circuit board. Wave soldering can still be used for certain surface mount ICs,
but it is not suitable for fine pitch SMDs. In these situations reflow soldering is
recommended. Driven by legislation and environmental forces the worldwide use of
lead-free solder pastes is increasing.
14.2 Through-hole mount packages
14.2.1 Soldering by dipping or by solder wave
Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 °C or
265 °C, depending on solder material applied, SnPb or Pb-free respectively.
The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the
plastic body must not exceed the specified maximum storage temperature (T
stg(max)
).
If the printed-circuit board has been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within the permissible limit.
14.2.2 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the
seating plane or not more than 2 mm above it. If the temperature of the soldering iron
bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit
temperature is between 300 and 400 °C, contact may be up to 5 seconds.
14.3 Surface mount packages
14.3.1 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and
binding agent) to be applied to the printed-circuit board by screen printing, stencilling
or pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example, convection or convection/infrared
heating in a conveyor type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending on heating method.
Typical reflow peak temperatures range from 215 to 270 °C depending on solder
paste material. The top-surface temperature of the packages should preferably be
kept:
• below 225 °C (SnPb process) or below 245 °C (Pb-free process)
– for all the BGA and SSOP-T packages
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

PCF85102C-2P/03,11

Mfr. #:
Buy PCF85102C-2P/03,11
Manufacturer:
NXP Semiconductors
Description:
IC EEPROM 2K I2C 100KHZ 8DIP
Lifecycle:
New from this manufacturer.
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