GENERAL DESCRIPTION
The AD7804/AD7808 are quad/octal 10-bit digital-to-analog
converters, with serial load capabilities, while the AD7805/AD7809
are quad/octal 10-bit digital-to-analog converters with parallel
load capabilities. These parts operate from a +3.3 V to +5 V
(±10%) power supply and incorporates an on-chip reference.
These DACs provide output signals in the form of V
BIAS
± V
SWING
.
V
SWING
is derived internally from V
BIAS
. On-chip control registers
include a system control register and channel control registers.
The system control register has control over all DACs in the
package. The channel control registers allow individual control
of DACs. The complete transfer function of each individual
DAC can be shifted around the V
BIAS
point using an on-chip
Sub DAC. All DACs contain double buffered data inputs,
which allow all analog outputs to be simultaneously updated
using the asynchronous LDAC input.
Control Features Channels Controlled Main DAC Sub DAC
Hardware Clear All 兹兹
System Control
Power Down
1
All 兹兹
System Standby
2
All 兹兹
System Clear All
Input Coding All 兹兹
Channel Control
Channel Standby
2
Selective 兹兹
Channel Clear Selective
V
BIAS
Selective 兹兹
NOTES
1
Power-down function powers down all internal circuitry including the reference.
2
Standby functions power down all circuitry except for the reference.
FUNCTIONAL BLOCK DIAGRAMS
V
OUT
D
V
OUT
C
V
OUT
B
V
OUT
A
CHANNEL C
CONTROL REG
CHANNEL B
CONTROL REG
CHANNEL A
CONTROL REG
DAC
REGISTER
DAC D
V
BIAS
DATA
REGISTER
AV
DD
DIVIDER
CHANNEL D
CONTROL REG
REFIN
REFOUT
LDACCLR
AV
DD
DV
DD
AGND DGND
CLKIN
FSIN
AD7804/
AD7808
COMP
SDIN
POWER ON
RESET
DAC
REGISTER
DAC C
V
BIAS
DATA
REGISTER
DAC
REGISTER
DAC B
V
BIAS
DATA
REGISTER
MUX
DAC
REGISTER
DAC A
V
BIAS
DATA
REGISTER
SYSTEM
CONTROL REG
INPUT SHIFT
REGISTER &
CONTROL LOGIC
MUX
MUX
1.23V REF
MUX
V
OUT
G*
V
OUT
E*
V
OUT
H*
V
OUT
F*
PD**
**ONLY AD7804 SHOWN FOR CLARITY
**SHOWS ADDITIONAL CHANNELS ON THE AD7808
**PIN ON THE AD7808 ONLY
V
OUT
D
V
OUT
C
V
OUT
B
V
OUT
A
CHANNEL C
CONTROL REG
CHANNEL B
CONTROL REG
CHANNEL A
CONTROL REG
DAC
REGISTER
DAC D
V
BIAS
DATA
REGISTER
AV
DD
DIVIDER
CHANNEL D
CONTROL REG
REFIN
REFOUT
LDACCLR
AV
DD
DV
DD
AGND DGND
WR
CS
AD7805/
AD7809
COMP
POWER ON
RESET
MUX
DAC
REGISTER
DAC C
V
BIAS
DATA
REGISTER
DAC
REGISTER
DAC B
V
BIAS
DATA
REGISTER
MUX
DAC
REGISTER
DAC A
V
BIAS
DATA
REGISTER
SYSTEM
CONTROL REG
INPUT
REGISTER
MUX
MUX
1.23V REF
CONTROL
LOGIC
MODE A0 A1 DB9 DB2 DB1 DB0
V
OUT
G*
V
OUT
H*
PD**
**ONLY AD7805 SHOWN FOR CLARITY
**SHOWS ADDITIONAL CHANNELS ON THE AD7809
**PIN ON THE AD7809 ONLY
A2**
V
OUT
E*
V
OUT
F*
Index on Page 26.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
+3.3 V to +5 V Quad/Octal 10-Bit DACs
FEATURES
Four 10-Bit DACs in One Package
Serial and Parallel Loading Facilities Available
AD7804 Quad 10-Bit Serial Loading
AD7805 Quad 10-Bit Parallel Loading
AD7808 Octal 10-Bit Serial Loading
AD7809 Octal 10-Bit Parallel Loading
+3.3 V to +5 V Operation
Power-Down Mode
Power-On Reset
Standby Mode (All DACs/Individual DACs)
Low Power All CMOS Construction
10-Bit Resolution
Double Buffered DAC Registers
Dual External Reference Capability
APPLICATIONS
Optical Disk Drives
Instrumentation and Communication Systems
Process Control and Voltage Setpoint Control
Trim Potentiometer Replacement
Automatic Calibration
AD7804/AD7805/AD7808/AD7809
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1998
AD7804/AD7805/AD7808/AD7809
REV. A–2–
Parameter B Grade
1
C Grade
1
Units Comments
STATIC PERFORMANCE
MAIN DAC
Resolution 10 10 Bits
Relative Accuracy ±3 ±3 LSB max
Gain Error ±3 ±3 % FSR max
Bias Offset Error
2
–80/+40 –80/+40 mV max DAC Code = 0.5 Full Scale
Zero-Scale Error
3
mV max DAC Code = 000H for Offset Binary
Monotonicity 9 10 Bits and 200H for Twos Complement Coding
Minimum Load Resistance 2 2 k min
SUB DAC
Resolution 8 8 Bits
Differential Nonlinearity ±0.125 ±0.125 LSB typ Refers to an LSB of the Main DAC
±0.5 ±0.5 LSB max
OUTPUT CHARACTERISTICS
Output Voltage Range
3
V
BIAS
± 15/16 × V
BIAS
V
BIAS
± 15/16 × V
BIAS
V Twos Complement Coding
V
BIAS
/16 to 31/16 × V
BIAS
V
BIAS
/16 to 31/16 × V
BIAS
V Offset Binary Coding
Voltage Output Settling Time to 10 Bits 4 4 µs max Typically 1.5 µs
Slew Rate 2.5 2.5 V/µs typ
Digital-to-Analog Glitch Impulse 1 1 nV-s typ 1 LSB Change Around the Major Carry
Digital Feedthrough 0.5 0.5 nV-s typ
Digital Crosstalk 0.5 0.5 nV-s typ
Analog Crosstalk ±0.2 ±0.2 LSB typ
DC Output Impedance 2 2 typ
Power Supply Rejection Ratio 0.002 0.002 %/% typ V
DD
± 10%
DAC REFERENCE INPUTS
REF IN Range 1.0 to V
DD
/2 1.0 to V
DD
/2 V min to V max
REF IN Input Leakage ±1 ±1 µA max Typically ±1 nA
DIGITAL INPUTS
Input High Voltage, V
IH
@ V
DD
= 5 V 2.4 2.4 V min
Input High Voltage, V
IH
@ V
DD
= 3.3 V 2.1 2.1 V min
Input Low Voltage, V
IL
@ V
DD
= 5 V 0.8 0.8 V max
Input Low Voltage, V
IL
@ V
DD
= 3.3 V 0.6 0.6 V max
Input Leakage Current ±10 µA max
Input Capacitance 10 10 pF max
Input Coding Twos Comp/Binary Twos Comp/Binary
REFERENCE OUTPUT
REF OUT Output Voltage 1.23 1.23 V nom
REF OUT Error ±8 ±8 % max
REF OUT Temperature Coefficient –100 –100 ppm/°C typ
REF OUT Output Impedance 5 5 k nom
POWER REQUIREMENTS
V
DD
(AV
DD
and DV
DD
) 3/5.5 3/5.5 V min to V max
I
DD
(AI
DD
Plus DI
DD
) Excluding Load Currents
Normal Mode 12 12 mA max V
IH
= V
DD
, V
IL
= DGND
System Standby (SSTBY) Mode 250 250 µAV
IH
= V
DD
, V
IL
= DGND
Power-Down (PD) Mode
@ +25°C 0.8 0.8 µA max V
IH
= V
DD
, V
IL
= DGND
T
MIN
–T
MAX
1.5 1.5 µA max
Power Dissipation Excluding Power Dissipated in Load
Normal Mode 66 66 mW max
System Standby (SSTBY) Mode 1.38 1.38 mW max
Power-Down (PD) Mode
@ +25°C 4.4 4.4 µW max
T
MIN
–T
MAX
8.25 8.25 µW max
NOTES
1
Temperature range is – 40°C to +85°C.
2
Can be minimized using the Sub DAC.
3
V
BIAS
is the center of the output voltage swing and can be V
DD
/2, Internal Reference or REFIN as determined by MX1 and MX0 in the channel control register.
Specifications subject to change without notice.
(AV
DD
and DV
DD
= 3.3 V 10% to 5 V 10%; AGND = DGND = 0 V;
Reference = Internal Reference; C
L
= 100 pF; R
L
= 2 k to GND. Sub DAC at Midscale. All specifications T
MIN
to T
MAX
unless otherwise noted.)
AD7804/AD7805–SPECIFICATIONS
V
BIAS
16
/ +40
V
BIAS
16
/ +40
Parameter B Grade
1
Units Comments
STATIC PERFORMANCE
MAIN DAC
Resolution 10 Bits
Relative Accuracy ±4 LSB max
Gain Error ±3 % FSR max
Bias Offset Error
2
±60 mV max DAC Code = 0.5 Full Scale
Zero-Scale Error ±35 mV max DAC Code = 000H for Offset Binary
Monotonicity 9 Bits and 200H for Twos Complement
Minimum Load Resistance 2 k min Coding
SUB DAC
Resolution 8 Bits
Differential Nonlinearity ±0.125 LSB typ Refers to an LSB of the Main DAC
±0.5 LSB max
OUTPUT CHARACTERISTICS
Output Voltage Range
3
V
BIAS
± 15/16 × V
BIAS
V Twos Complement Coding
V
BIAS
/16 to 31/16 × V
BIAS
V Offset Binary Coding
Voltage Output Settling Time to 10 Bits 4 µs max Typically 1.5 µs
Slew Rate 2.5 V/µs typ
Digital-to-Analog Glitch Impulse 1 nV-s typ 1 LSB Change Around the Major Carry
Digital Feedthrough 0.5 nV-s typ
Digital Crosstalk 0.5 nV-s typ
Analog Crosstalk ±0.2 LSB typ
DC Output Impedance 2 typ
Power Supply Rejection Ratio 0.002 %/% typ V
DD
± 10%
DAC REFERENCE INPUTS
REF IN Range 1.0 to V
DD
/2 V min to V max
REF IN Input Leakage ±1 µA max Typically ±1 nA
DIGITAL INPUTS
Input High Voltage, V
IH
@ V
DD
= 5 V 2.4 V min
Input High Voltage, V
IH
@ V
DD
= 3.3 V 2.1 V min
Input Low Voltage, V
IL
@ V
DD
= 5 V 0.8 V max
Input Low Voltage, V
IL
@ V
DD
= 3.3 V 0.6 V max
Input Leakage Current ±10 µA max
Input Capacitance 8 pF max
Input Coding Twos Comp/Binary
REFERENCE OUTPUT
REF OUT Output Voltage 1.23 V nom
REF OUT Error ±8 % max
REF OUT Temperature Coefficient –100 ppm/°C typ
REF OUT Output Impedance 5 k nom
POWER REQUIREMENTS
V
DD
(AV
DD
and DV
DD
) 3/5.5 V min to V max
I
DD
(AI
DD
Plus DI
DD
) Excluding Load Currents
Normal Mode 18 mA max V
IH
= V
DD
, V
IL
= DGND
System Standby (SSTBY) Mode 250 µA max V
IH
= V
DD
, V
IL
= DGND
Power-Down (PD) Mode
@ +25°C1µA max V
IH
= V
DD
, V
IL
= DGND
T
MIN
–T
MAX
3 µA max
Power Dissipation Excluding Power Dissipated in Load
Normal Mode 99 mW max
System Standby (SSTBY) Mode 1.38 mW max
Power-Down (PD) Mode
@ +25°C 5.5 µW max
T
MIN
–T
MAX
16.5 µW max
NOTES
1
Temperature range is – 40°C to +85°C.
2
Can be minimized using the Sub DAC.
3
V
BIAS
is the center of the output voltage swing and can be V
DD
/2, Internal Reference or REFIN as determined by MX1 and MX0 in the channel control register.
Specifications subject to change without notice.
(AV
DD
and DV
DD
= 3.3 V 10% to 5 V 10%; AGND = DGND = 0 V;
Reference = Internal Reference; C
L
= 100 pF; R
L
= 2 k to GND. Sub DAC at Midscale. All specifications T
MIN
to T
MAX
unless otherwise noted.)
AD7808/AD7809–SPECIFICATIONS
AD7804/AD7805/AD7808/AD7809
REV. A
–3–

AD7808BRZ-REEL

Mfr. #:
Manufacturer:
Description:
Digital to Analog Converters - DAC 3.3V-5V Quad/ Octal 10-Bit
Lifecycle:
New from this manufacturer.
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