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AD7808BRZ-REEL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
AD7804/AD7805/AD7808/AD7809
REV. A–4–
(V
DD
= 3.3 V ⴞ 10% to 5 V ⴞ 10%; AGND = DGND = 0 V; Reference =
Internal Reference. All specifications T
MIN
to T
MAX
unless otherwise noted.)
Limit at T
MIN
, T
MAX
Parameter All Versions Units Description
t
1
100 ns min CLKIN Cycle Time
t
2
40 ns min CLKIN High Time
t
3
40 ns min CLKIN Low Time
t
4
30 ns min FSIN Setup Time
t
5
30 ns min Data Setup Time
t
6
5 ns min Data Hold Time
t
6A
6 ns min LDAC Hold Time
t
7
90 ns max FSIN Hold Time
20 ns min
t
8
40 ns min LDAC, CLR Pulsewidth
t
9
100 ns min LDAC Setup Time
NOTES
1
Sample tested during initial release and after any redesign or process change that may affect this parameter. All input signals are specified with tr = tf = 5 ns and
timed from a voltage of (V
IL
+ V
IH
)/2.
Specifications subject to change without notice.
CLKIN(I)
FSIN(I)
SDIN(I) DB15
t
2
t
3
t
7
t
8
CLR
LDAC
1
t
5
t
6A
t
1
t
9
t
8
t
4
t
5
t
6
DB0
1
TIMING REQUIREMENTS FOR SYNCHRONOUS LDAC UPDATE OR LDAC MAY BE TIED PERMANENTLY LOW IF REQUIRED.
2
TIMING REQUIREMENTS FOR ASYNCHRONOUS LDAC UPDATE.
LDAC
2
Figure 1. Timing Diagram for AD7804 and AD7808
AD7804/AD7808 TIMING CHARACTERISTICS
1
AD7804/AD7805/AD7808/AD7809
–5–REV. A
AD7805/AD7809 TIMING CHARACTERISTICS
1
(V
DD
= 3.3 V ⴞ 10% to 5 V ⴞ 10%; AGND = DGND = 0 V; Reference
= Internal Reference. All specifications T
MIN
to T
MAX
unless otherwise noted.)
Limit at T
MIN
, T
MAX
Parameter All Versions Unit Description
t
1
25 ns min Mode Valid to Write Setup Time
t
2
4.5 ns min Mode Valid to Write Hold Time
t
3
25 ns min Address Valid to Write Setup Time
t
4
4.5 ns min Address Valid to Write Hold Time
t
5
25 ns min Data Setup Time
t
6
4.5 ns min Data Hold Time
t
6A
6 ns min LDAC Valid to Write Hold Time
t
7
40 ns min Chip Select to Write Setup Time
t
8
0 ns min Chip Select to Write Hold Time
t
9
40 ns min Write Pulsewidth
t
10
100 ns min Time Between Successive Writes
t
11
40 ns min LDAC, CLR Pulsewidth
t
12
100 ns min Write to LDAC Setup Time
NOTE
1
Sample tested during initial release and after any redesign or process change that may affect this parameter. All input signals are specified with tr = tf = 5 ns and
timed from a voltage of (V
IL
+ V
IH
)/2.
Specifications subject to change without notice.
MODE
CS
WR
DATA
LDAC
2
CLR
LDAC
1
t
1
t
2
t
3
t
4
t
7
t
8
t
9
t
5
t
6
t
10
t
11
t
12
t
11
1
TIMING REQUIREMENTS FOR SYNCHRONOUS LDAC UPDATE OR LDAC MAY BE TIED PERMANENTLY LOW IF REQUIRED.
2
TIMING REQUIREMENTS FOR ASYNCHRONOUS LDAC UPDATE.
t
6A
A0, A1, A2
Figure 2. Timing Diagram for AD7805/AD7809 Parallel Write
AD7804/AD7805/AD7808/AD7809
REV. A–6–
PDIP (N-24) Package, Power Dissipation . . . . . . . . . 670 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 105°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260°C
SOIC (R-28) Package, Power Dissipation . . . . . . . . . 875 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 70°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
PDIP (N-28) Package, Power Dissipation . . . . . . . . . 875 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 75°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260°C
SSOP (RS-28) Package, Power Dissipation . . . . . . . . 875 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 110°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
TQFP (SU-44) Package, Power Dissipation . . . . . . 450
mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 116°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
The outputs may be shorted to voltages in this range provided the power dissipation
of the package is not exceeded.
3
Transient currents of up to 100 mA will not cause SCR latch-up.
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25°C unless otherwise noted)
DV
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AV
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V + 0.3 V
Digital Input Voltage to DGND . . . . . –0.3 V to DV
DD
+ 0.3 V
Analog Input Voltage to AGND . . . . . –0.3 V to AV
DD
+ 0.3 V
COMP to AGND . . . . . . . . . . . . . . . –0.3 V to AV
DD
+ 0.3 V
REF OUT to AGND . . . . . . . . . . . . . . . . . . –0.3 V to + AV
DD
REF IN to AGND . . . . . . . . . . . . . . . –0.3 V to AV
DD
+ 0.3 V
V
OUT
to AGND
2
. . . . . . . . . . . . . . . . –0.3 V to AV
DD
+ 0.3 V
Input Current to Any Pin Except Supplies
3
. . . . . . . . ±10 mA
Operating Temperature Range
AD7804/AD7805 Commercial Plastic
(B, C Versions) . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD7808/AD7809 Commercial Plastic
(B, C Versions) . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
SOIC (R-16) Package, Power Dissipation . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 75°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
PDIP (N-16) Package, Power Dissipation . . . . . . . . . 670 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 116°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260°C
SOIC (R-24) Package, Power Dissipation . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 75°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ORDERING GUIDE
Supply Temperature Relative Package
Model Voltage Range Accuracy Package Descriptions Options
AD7804BN 3.3 V to 5 V –40°C to +85°C ±3 LSB 16-Lead Plastic DIP N-16
AD7804BR 3.3 V to 5 V –40°C to +85°C ±3 LSB 16-Lead Small Outline IC R-16
AD7805BN 3.3 V to 5 V –40°C to +85°C ±3 LSB 28-Lead Plastic DIP N-28
AD7805BR 3.3 V to 5 V –40°C to +85°C ±3 LSB 28 Lead Small Outline IC R-28
AD7805BRS 3.3 V to 5 V –40°C to +85°C ±3 LSB 28-Lead Shrink Small Outline Package RS-28
AD7805CR 3.3 V to 5 V –40°C to +85°C ±3 LSB 28-Lead Small Outline IC R-28
AD7808BN 3.3 V to 5 V –40°C to +85°C ±4 LSB 24-Lead Plastic DIP N-24
AD7808BR 3.3 V to 5 V –40°C to +85°C ±4 LSB 24 Lead Small Outline IC R-24
AD7809BST 3.3 V to 5 V –40°C to +85°C ±4 LSB 44-Lead Thin Plastic Quad Flatpack (TQFP) SU-44
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although these devices feature proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28

AD7808BRZ-REEL

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Buy AD7808BRZ-REEL
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Description:
Digital to Analog Converters - DAC 3.3V-5V Quad/ Octal 10-Bit
Lifecycle:
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