NB6L14S
http://onsemi.com
4
Table 5. DC CHARACTERISTICS V
CC
= 2.375 V to 2.625 V, GND = 0 V, T
A
= −40°C to +85°C
Symbol
Characteristic Min Typ Max Unit
I
CC
Power Supply Current (Note 9) 65 100 mA
DIFFERENTIAL INPUTS DRIVEN SINGLE−ENDED (Figures 17, 18, 22, and 24)
V
th
Input Threshold Reference Voltage Range (Note 8) GND +100 V
CC
− 100 mV
V
IH
Single−ended Input HIGH Voltage V
th
+ 100 V
CC
mV
V
IL
Single−ended Input LOW Voltage GND V
th
− 100 mV
V
REFAC
Reference Output Voltage (Note 11) V
CC
− 1.600 V
CC
− 1.425 V
CC
− 1.300 V
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 10, 12, NO TAG, NO TAG, 23, and 25)
V
IHD
Differential Input HIGH Voltage 100 V
CC
mV
V
ILD
Differential Input LOW Voltage GND V
IHD
− 100 mV
V
CMR
Input Common Mode Range (Differential Configuration) GND + 50 V
CC
− 50 mV
V
ID
Differential Input Voltage (V
IHD
− V
ILD
) 100 V
CC
mV
R
TIN
Internal Input Termination Resistor 40 50 60
W
LVDS OUTPUTS (Note 5)
V
OD
Differential Output Voltage 250 450 mV
DV
OD
Change in Magnitude of V
OD
for Complementary Output States
(Note 10)
0 1 25 mV
V
OS
Offset Voltage (Figure 21) 1125 1375 mV
DV
OS
Change in Magnitude of V
OS
for Complementary Output States
(Note 10)
0 1 25 mV
V
OH
Output HIGH Voltage (Note 6) 1425 1600 mV
V
OL
Output LOW Voltage (Note 7) 900 1075 mV
LVTTL/LVCMOS INPUT, EN
V
IH
Input HIGH Voltage 2.0 V
CC
V
V
IL
Input LOW Voltage GND 0.8 V
I
IH
Input HIGH Current −150 150
mA
I
IL
Input LOW Current −150 150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. LVDS outputs require 100 W receiver termination resistor between differential pair. See Figure 20.
6. V
OH
max = V
OS
max + ½ V
OD
max.
7. V
OL
max = V
OS
min − ½ V
OD
max.
8. V
th
is applied to the complementary input when operating in single−ended mode.
9. Input termination pins open at the DC level within V
CMR
and output pins loaded with R
L
= 100 W across differential.
10.Parameter guaranteed by design verification not tested in production.
11. V
REFAC
used to rebias capacitor−coupled inputs only (see Figures 17 and 18).
