AD9433
Rev. A | Page 14 of 20
TERMINOLOGY
Analog Bandwidth
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between the 50% point of the rising edge of the
ENCODE command and the instant at which the analog input
is sampled.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Differential Analog Input Resistance, Differential Analog
Input Capacitance, and Differential Analog Input Impedance
The real and complex impedances measured at each analog
input port. The resistance is measured statically and the
capacitance and differential input impedances are measured
with a network analyzer.
Differential Analog Input Voltage Range
The peak-to-peak differential voltage that must be applied to
the converter to generate a full-scale response. Peak differential
voltage is computed by observing the voltage on a single pin
and subtracting the voltage from the other pin, which is 180°
out of phase. Peak-to-peak differential voltage is computed by
rotating the input phase 180° and taking the peak measure-
ment again. The difference is then computed between both
peak measurements.
Differential Nonlinearity (DNL)
The deviation of any code width from an ideal 1 LSB step.
Effective Number of Bits (ENOB)
The effective number of bits (ENOB) is calculated from the
measured SNR based on the following equation:
02.6
⎠⎝
=ENOB
log20dB76.1
⎟
⎟
⎞
⎜
⎜
⎛
−
+−
AmplitudeInput
AmplitudeScaleFull
SNR
MEASURED
Encode Pulse Width/Duty Cycle
Pulse width high is the minimum amount of time that the
encode pulse should be left in the Logic 1 state to achieve the
rated performance. Pulse width low is the minimum amount
of time that the encode pulse should be left in the Logic 0 state.
At a given clock rate, these specifications define an acceptable
encode duty cycle.
Full-Scale Input Power
Expressed in dBm. Computed using the following equation:
Gain Error
The difference between the measured and the ideal full-scale
input voltage range of the ADC.
Harmonic Distortion
The ratio of the rms signal amplitude fundamental frequency
to the rms signal amplitude of a single harmonic component
(second, third, and so on); reported in dBc.
Integral Nonlinearity (INL)
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a “best straight line”
determined by a least square curve fit.
Maximum Conversion Rate
The maximum encode rate at which parametric testing is
performed.
Minimum Conversion Rate
The encode rate at which the SNR of the lowest analog signal
frequency drops by no more than 3 dB below the guaranteed
limit.
Noise (for Any Range within the ADC)
Noise can be calculated using the following equation:
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
−−
××=
10
100.001
dBFSdBcdBm
NOISE
SignalSNRFS
ZV
where:
Z is the input impedance.
FS is the full scale of the device for the frequency in question.
SNR is the value for the particular input level.
Signal is the signal level within the ADC reported in dB below
full scale. This value includes both thermal and quantization
noise.
Output Propagation Delay
The delay between a differential crossing of ENCODE and
ENCODE
and the time when all output data bits are within
valid logic levels.
Power Supply Rejection Ratio (PSRR)
The ratio of a change in input offset voltage to a change in
power supply voltage.
Signal-to-Noise and Distortion (SINAD)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, including harmonics but excluding dc.
Signal-to-Noise Ratio (SNR)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral com-
ponents, excluding the first five harmonics and dc.
⎟
⎠
⎜
⎝
001.0
⎟
⎟
⎟
⎞
⎜
⎜
⎜
⎛
= log10
2
Z
FullScaleV
Power
rms
FullScale
