2001-2012 Microchip Technology Inc. DS21431C-page 1
TC520A
Features
Converts TC500/TC500A/TC510/TC514 to Serial
Operation
Programmable Conversion Rate and Resolution for
Maximum Flexibility
Supports up to 17-Bits of Accuracy Plus Polarity Bit
Low Power Operation: Typically 7.5m
14-Pin PDIP or 16-Pin SOIC Packages
Polled or Interrupt Mode Operation
Applications
Computer Peripheral Interface
Portable Instruments
Data Acquisition System Interface
Device Selection Table
Package Type
General Description
The TC520A serial interface adapter provides logic
control for Microchip's TC500/TC500A/TC510/TC514
family of dual slope, integrating A/D converters. It
directly manages TC500 converter phase control sig-
nals A, B and CMPTR, thereby reducing host
processor task loading and software complexity. Com-
munication with the TC520A is accomplished over a 3
wire serial port. Key converter operating parameters
are programmable for complete user flexibility. Data
conversion is initiated when the CE
input is brought
low. The converted data (plus overrange and polarity
bits) are held in an 18-bit shift register until read by the
processor or until the next conversion is completed.
Data may be clocked out of the TC520A at any time,
and at any rate, the user prefers. A Data Valid (DV
) out-
put is driven active at the start of each conversion
cycle, indicating the 18-bit shift register update has just
been completed. This signal may be polled by the pro-
cessor or can be used as data ready interrupt. The
TC520A timebase can be derived from an external fre-
quency source of up to 6MHz or can operate from its
own external crystal. It requires a single 5V logic supply
and dissipates less than 7.5m.
Part Number Package Temperature Range
TC520ACOE 16-Pin SOIC (Wide) 0C to +70C
TC520ACPD 14-Pin PDIP 0C to +70C
B
CMPTR
DGND
V
DD
A
D
IN
OSC
OUT
DCLK
OSC
IN
D
OUT
114
213
312
411
510
69
78
TC520A
CE
DV
LOAD
READ
14-Pin PDIP
16-Pin SOIC
8
1
2
3
4
5
6
7
TC520A
D
IN
B
14
13
12
11
10
9
15
16
LOAD
DV
CE
DCLKA
D
OUT
READ
N/C
CMPTR
DGND
V
DD
OSC
OUT
OSC
IN
N/C
Serial Interface Adapter for TC500 A/D Converter Family
TC520A
DS21431C-page 2 2001-2012 Microchip Technology Inc.
Functional Block Diagram
Logic Control
Gate
8-Bit Counter
÷ 256
8-Bit Shift Reg.
÷4
Gate
Pinout of 14-Pin
Package
7
SYSCLK
8
6
A
B
CMPTR
CE
DV
5
4
3
14
13
Gate
Timeout
Force Auto Zero
Polarity Bit
Clear Count
1
2
V
DD
GND
16-Bit Counter
18-Bit Shift Register
Gate
Overrange
Bit
11
12
9
10
8
D
CLK
D
OUT
D
IN
LOAD
READ
16
OSC
IN
OSC
OUT
2001-2012 Microchip Technology Inc. DS21431C-page 3
TC520A
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
DC Supply Voltage (V
DD
)....................................+6.0V
Input Voltage (All Inputs V
IN
):.... - 0.3V to (V
DD
+ 0.3V)
Operating Temperature Range (T
A
) .......... 0°C to 70°C
Storage Temperature Range..............-65°C to +150°C
*Stresses above those listed under "Absolute Maximum Rat-
ings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at
these or any other conditions above those indicated in the
operation sections of the specifications is not implied. Expo-
sure to Absolute Maximum Rating conditions for extended
periods may affect device reliability.
TC520A ELECTRICAL SPECIFICATIONS
Electrical Characteristics: V
DD
= 5V, F
OSC
= 1MHz, T
A
= +25°C, unless otherwise specified.
Symbol Parameters Min Typ Max Unit Test Conditions
Supply
V
DD
Operating Voltage Range 4.5 5 5.5 V
I
DD
Supply Current 0.8 1.5 mA
Input Characteristics
V
IL
Low Input Voltage 0.8 V
V
IH
High Input Voltage 2.0 V
I
IL
Input Leakage Current 10 A
I
PD
Pull-down Current (CE)—5 A
I
PU
Pull-up Current (READ, LOAD) — 5 A
Output Characteristics (I
OUT
= 250 A, V
DD
= 5V)
V
OL
Low Output Voltage 0.2 0.3 V
V
OH
High Output Voltage 3.5 4.3 V
T
R
, T
F
C
L
= 10pF, Rise/Fall Times 250 nsec
Oscillator (OSC
IN
, OSC
OUT
)
F
XTL
Crystal Frequency 1.0 4.0 MHz
F
OSC
External Frequency (OSC
IN
)— 6.0MHz
Timing Characteristics
T
RD
READ Delay Time 250 nsec
T
RS
Data Read Setup Time 1 sec
T
DRS
D
CLK
to D
OUT
Delay 450 nsec
T
LS
LOAD Setup Time 1 sec
T
DLS
Data Load Setup Time 50 nsec
T
PWL
D
CLK
Pulse Width Low Time 150 nsec
T
PWH
D
CLK
Pulse Width High Time 150 nsec
T
LDL
Load Default Low Time 250 nsec
T
LDS
Load Default Setup Time 250 nsec
Parameter
T
IZ
Integrator ZERO Time 0.5 msec
T
AZI
Auto zero (RESET) Time at Power-Up 100 msec

TC520ACPD

Mfr. #:
Manufacturer:
Microchip Technology
Description:
Interface - Specialized Srl Intrface Adapter
Lifecycle:
New from this manufacturer.
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