LTC3558EUD#PBF Datasheet LTC3558EUD#PBF, LTC3558EUD#TRPBF | P25-P27

LTC3558

3558f

Buck-Boost Switching Regulator

The LTC3558 contains a 2.25MHz constant-frequency,

voltage mode, buck-boost switching regulator. The regu-

lator provides up to 400mA of output load current. The

buck-boost switching regulator can be programmed for a

minimum output voltage of 2.75V and can be used to power

a microcontroller core, microcontroller I/O, memory, disk

drive, or other logic circuitry. To suit a variety of applica-

tions, different mode functions allow the user to trade off

noise for efﬁ ciency. Two modes are available to control the

operation of the buck-boost regulator. At moderate to heavy

loads, the constant-frequency PWM mode provides the

least noise switching solution. At lighter loads, Burst Mode

operation may be selected. Regulation is maintained by an

error ampliﬁ er that compares the divided output voltage

with a reference and adjusts the compensation voltage

accordingly until the FB2 voltage has stabilized at 0.8V. The

buck-boost switching regulator also includes soft-start to

limit inrush current and voltage overshoot when powering

on, short-circuit current protection, and switch node slew

limiting circuitry for reduced radiated EMI.

Buck-Boost Regulator PWM Operating Mode

In PWM mode, the voltage seen at the feedback node is

compared to a 0.8V reference. From the feedback voltage,

an error ampliﬁ er generates an error signal seen at the

pin. This error signal controls PWM waveforms that

modulate switches A (input PMOS), B (input NMOS), C

(output NMOS), and D (output PMOS). Switches A and

B operate synchronously, as do switches C and D. If the

input voltage is signiﬁ cantly greater than the programmed

output voltage, then the regulator will operate in buck

mode. In this case, switches A and B will be modulated,

with switch D always on (and switch C always off), to step-

down the input voltage to the programmed output. If the

input voltage is signiﬁ cantly less than the programmed

output voltage, then the converter will operate in boost

mode. In this case, switches C and D are modulated, with

switch A always on (and switch B always off), to step up

the input voltage to the programmed output. If the input

voltage is close to the programmed output voltage, then

the converter will operate in four-switch mode. While

operating in four-switch mode, switches turn on as per

the following sequence: switches A and D

→ switches A

and C

→ switches B and D → switches A and D.

Buck-Boost Regulator Burst Mode Operation

In Burst Mode operation, the switching regulator uses a

hysteretic feedback voltage algorithm to control the output

voltage. By limiting FET switching and using a hysteretic

control loop switching losses are greatly reduced. In

this mode, output current is limited to 50mA. While in

Burst Mode operation, the output capacitor is charged

to a voltage slightly higher than the regulation point. The

buck-boost converter then goes into a SLEEP state, dur-

ing which the output capacitor provides the load current.

The output capacitor is charged by charging the inductor

until the input current reaches 250mA typical, and then

discharging the inductor until the reverse current reaches

0mA typical. This process of bursting current is repeated

until the feedback voltage has charged to the reference

voltage plus 6mV (806mV typical). In the SLEEP state,

most of the regulator’s circuitry is powered down, helping

to conserve battery power. When the feedback voltage

drops below the reference voltage minus 6mV (794mV

typical), the switching regulator circuitry is powered on

and another burst cycle begins. The duration for which the

regulator operates in SLEEP depends on the load current

and output capacitor value. The SLEEP time decreases

as the load current increases. The maximum deliverable

load current in Burst Mode operation is 50mA typical.

The buck-boost regulator may not enter SLEEP if the load

current is greater than 50mA. If the load current increases

beyond this point while in Burst Mode operation, the out-

put may lose regulation. Burst Mode operation provides a

signiﬁ cant improvement in efﬁ ciency at light loads at the

expense of higher output ripple when compared to PWM

mode. For many noise-sensitive systems, Burst Mode

operation might be undesirable at certain times (i.e., dur-

ing a transmit or receive cycle of a wireless device), but

highly desirable at others (i.e., when the device is in low

power standby mode).

APPLICATIONS INFORMATION

LTC3558

3558f

The output ﬁ lter zero is given by:

FILTER ZERO

ESR OUT

•• •

2 π

where R

ESR

is the capacitor equivalent series resistance.

A troublesome feature in boost mode is the right-half

plane zero (RHP), and is given by:

ILV

RHPZ

OUT OUT

2• • • •π

The loop gain is typically rolled off before the RHP zero

frequency.

A simple Type I compensation network, as shown in Figure

10, can be incorporated to stabilize the loop, but at the

cost of reduced bandwidth and slower transient response.

To ensure proper phase margin, the loop requires to be

crossed over a decade before the LC double pole.

The unity-gain frequency of the error ampliﬁ er with the

Type I compensation is given by:

•• •

Buck-Boost Switching Regulator Output Voltage

Programming

The buck-boost switching regulator can be programmed

for output voltages greater than 2.75V and less than 5.45V.

To program the output voltage, a resistor divider is con-

nected between V

OUT2

and the feedback node (FB2) as

shown in Figure 9. The output voltage is given by V

OUT2

= 0.8(1 + R1/R2).

APPLICATIONS INFORMATION

Figure 10. Error Ampliﬁ er with Type I Compensation

3558 F10

0.8V

FB2

OUT2

–

ERROR

AMP

Figure 9. Programming the Buck-Boost Output Voltage Requires

a Resistor Divider Connected Between V

OUT2

and FB2

LTC3558

FB2

OUT2

3558 F09

Closing the Feedback Loop

The LTC3558 incorporates voltage mode PWM control. The

control to output gain varies with operation region (buck,

boost, buck-boost), but is usually no greater than 20. The

output ﬁ lter exhibits a double pole response given by:

FILTER POLE

OUT

•• •

2 π

where C

OUT

is the output ﬁ lter capacitor.

LTC3558

3558f

Figure 11. Error Ampliﬁ er with Type III Compensation

Most applications demand an improved transient response

to allow a smaller output ﬁ lter capacitor. To achieve a higher

bandwidth, Type III compensation is required. Two zeros

are required to compensate for the double-pole response.

Type III compensation also reduces any V

OUT2

overshoot

seen during a start-up condition. A Type III compensa-

tion circuit is shown in Figure 11 and yields the following

transfer function:

VRCC

sR C s R R C

OUT

11 2

1221 133

+++

()

•

()[()]

sssRCC sRC1212133+

⎡

⎣

⎤

⎦

+(|| )( )

A Type III compensation network attempts to introduce

a phase bump at a higher frequency than the LC double

pole. This allows the system to cross unity gain after the

LC double pole, and achieve a higher bandwidth. While

attempting to cross over after the LC double pole, the

system must still cross over before the boost right-half

plane zero. If unity gain is not reached sufﬁ ciently before

the right-half plane zero, then the –180° of phase lag from

the LC double pole combined with the –90° of phase lag

from the right-half plane zero will result in negating the

phase bump of the compensator.

The compensator zeros should be placed either before

or only slightly after the LC double pole such that their

positive phase contributions offset the –180° that occurs

at the ﬁ lter double pole. If they are placed at too low of a

frequency, they will introduce too much gain to the system

and the crossover frequency will be too high. The two high

frequency poles should be placed such that the system

crosses unity gain during the phase bump introduced

by the zeros and before the boost right-half plane zero

and such that the compensator bandwidth is less than

the bandwidth of the error amp (typically 900kHz). If the

gain of the compensation network is ever greater than

the gain of the error ampliﬁ er, then the error ampliﬁ er no

longer acts as an ideal op amp, and another pole will be

introduced at the same point.

Recommended Type III compensation components for a

3.3V output are:

R1: 324kΩ

: 105kΩ

C1: 10pF

R2: 15k

C2: 330pF

R3: 121kΩ

C3: 33pF

OUT

: 22F

OUT

: 2.2H

APPLICATIONS INFORMATION

3558 F11

0.8V

FB2

OUT2

–

ERROR

AMP

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LTC3558EUD#PBF

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Battery Management Lin USB Bat Chr w/ Buck & Buck-Boost Reg

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