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FDWS9510L-F085

P1-P3P4-P6P7-P7
© Semiconductor Components Industries, LLC, 2018
July, 2018 − Rev. 1
1 Publication Order Number:
FDWS9510L−F085/D
FDWS9510L-F085
P-Channel Logic Level
POWERTRENCH
)
MOSFET
−40 V, −50 A, 13.5 mW
Features
• Typ R
DS(on)
= 11 mW at V
GS
= −10 V; I
D
= −50 A
• Typ Q
g(tot)
= 28 nC at V
GS
= −10 V; I
D
= −50 A
• UIS Capability
• Wettable Flanks for Automatic Optical Inspection (AOI)
• AEC−Q101 Qualified
• These Devices are Pb−Free and are RoHS Compliant
Applications
• Automotive Engine Control
• Powertrain Management
• Solenoid and Motor Drivers
• Electronic Steering
• Integrated Starter/Alternator
• Distributed Power Architectures and VRM
• Primary Switch for 12 V Systems
MAXIMUM RATINGS (T
J
= 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage V
DSS
−40 V
Gate−to−Source Voltage V
GS
±16 V
Continuous Drain Current
(V
GS
= 10 V) (Note 1)
T
C
= 25°C
I
D
−50
A
Pulsed Drain Current T
C
= 25°C See
Figure 4
Single Pulse Avalanche Energy (Note 2) E
AS
32 mJ
Power Dissipation
P
D
75 W
Derate above 25°C 0.5 W/°C
Operating and Storage Temperature T
J
, T
STG
−55 to
+175
°C
Thermal Resistance (Junction−to−Case)
R
q
JC
2 °C/W
Maximum Thermal Resistance
(Junction−to−Ambient) (Note 3)
R
q
JA
50 °C/W
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current is limited by wirebond configuration
2. Starting Tj = 25°C, L = 40 mH, I
AS
= −40 A, V
DD
= −40 V during inductor
charging and V
DD
= 0 V during time in avalanche
3. R
q
JA
is the sum of the junction−to−case and case−to−ambient thermal
resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
q
JC
is guaranteed by design while R
q
JA
is determined by the user’s board design. The maximum rating presented
here is based on mounting on a 1 in
2
pad of 2 oz copper.
www.onsemi.com
G (4)
S (1,2,3)
D (5,6,7,8)
DFN8
Power 56
CASE 506DW
1
See detailed ordering, marking and shipping information on
page 2 of this data sheet.
ORDERING INFORMATION
V
(BR)DSS
R
DS(ON)
MAX I
D
MAX
−40 V
13.5 mW @ −10 V
−50 A
FDWS9510L−F085
www.onsemi.com
2
PACKAGE MARKING AND ORDERING INFORMATION
Device Device Marking Package Reel Size Tape Width Quantity
FDWS9510L−F085 FDWS9510L Power 56 13″ 12 mm 3000 units
ELECTRICAL CHARACTERISTICS (T
J
= 25°C unless otherwise specified)
Symbol Parameter Conditions Min Typ Max Unit
OFF CHARACTERISTICS
B
VDSS
Drain−to−Source Breakdown Voltage
I
D
= −250 mA, V
GS
= 0 V
−40 − − V
I
DSS
Drain−to−Source Leakage Current V
DS
= −40 V,
V
GS
= 0 V
T
J
= 25°C − − 1
mA
T
J
= 175°C (Note 4) − − 1 mA
I
GSS
Gate−to−Source Leakage Current V
GS
= ±16 V − − ±100 nA
ON CHARACTERISTICS
V
GS(th)
Gate−to−Source Threshold Voltage
V
GS
= V
DS
, I
D
= −250 mA
−1 −1.8 −3 V
R
DS(on)
Drain−to−Source On−Resistance
I
D
= −25 A, V
GS
= −4.5 V − 18 23
mW
I
D
= −50 A
V
GS
= −10 V
T
J
= 25°C − 11 13.5 mW
T
J
= 175°C (Note 4) − 18.8 23
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
V
DS
= −20 V, V
GS
= 0 V, f = 1 MHz
− 2320 −
pF
C
oss
Output Capacitance − 811 −
C
rss
Reverse Transfer Capacitance − 38 −
R
g
Gate Resistance V
GS
= 0.5 V, f = 1 MHz − 23 −
W
Q
g(tot)
Total Gate Charge V
GS
= 0 to −10 V − 28 37
nC
Q
g(th)
Threshold Gate Charge V
GS
= 0 to −1 V − 4 −
Q
gs
Gate−to−Source Gate Charge
V
DD
= −20 V,
I
D
= −50 A
− 7 −
Q
gd
Gate−to−Drain “Miller” Charge − 4 −
SWITCHING CHARACTERISTICS
t
on
Turn−On Time
V
DD
= −20 V, I
D
= −50 A,
V
GS
= −10 V, R
GEN
= 6 W
− − 20
ns
t
d(on)
Turn−On Delay Time − 10 −
t
r
Turn−On Rise Time − 4 −
t
d(off)
Turn−Off Delay Time − 110 −
t
f
Turn−Off Fall Time − 37 −
t
off
Turn−Off Time − − 222
DRAIN−SOURCE DIODE CHARACTERISTICS
V
SD
Source−to−Drain Diode Voltage
I
SD
= −50 A, V
GS
= 0 V − −1 −1.25
V
I
SD
= −25 A, V
GS
= 0 V − −0.9 −1.2
T
rr
Reverse Recovery Time I
F
= −50 A, dI
SD
/dt = 100 A/ms − 44 62 ns
Q
rr
Reverse Recovery Charge − 31 47 nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at T
J
= 175°C. Product is not tested to this condition in production
FDWS9510L−F085
www.onsemi.com
3
TYPICAL CHARACTERISTICS
Figure 1. Normalized Power Dissipation vs.
Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
T
C
, CASE TEMPERATURE (°C) T
C
, CASE TEMPERATURE (°C)
Figure 3. Normalized Maximum Transient Thermal Impedance
t, RECTANGULAR PULSE DURATION (s)
Figure 4. Peak Current Capability
t, RECTANGULAR PULSE DURATION (s)
POWER DISSIPATION MULTIPLIER
I
D
, DRAIN CURRENT (A)
Z
q
JC
, NORMALIZED THERMAL IMPEDANCE
I
DM
, PEAK CURRENT (A)
Current Limited
by Package
V
GS
= 10 V
V
GS
= −10 V
0
0.2
0.4
0.6
0.8
1.0
0 25 50 100 125
0.01
0.1
0.00001 0.0001 0.01
10
100
1
2
0.001
175
1.2
0
10
20
30
40
25 50 75 100 150 17
5
50
60
1000
75 150 125
0.1 1 1
0
0.00001 0.0001 0.010.001 0.1 1 1
0
Single Pulse
Single Pulse
50% Duty Cycle
20%
10%
5%
2%
1%
P
DM
t
1
t
2
DUTY CYCLE, D = t
1
/t
2
Peak T
J
= P
DM
X Z
q
JC
X R
q
JC
+ T
C
T
C
= 25°C
For temperatures above 25°C
derate peak current as follows:
I + I
25
ƪ
175 * T
C
150
Ǹ
ƫ
P1-P3P4-P6P7-P7

FDWS9510L-F085

Mfr. #:
Buy FDWS9510L-F085
Manufacturer:
ON Semiconductor
Description:
MOSFET PT8P 40V LL PQFN56
Lifecycle:
New from this manufacturer.
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