the MOSFET, it is the inductance from the drain to the
source lead.
Alternately, to save board space and cost, the RC net-
works above can be omitted; however, the value of
R
ILIM
should be raised to account for the voltage step
caused by the inductive divider.
An additional switching noise filter may be needed at
ILIM by connecting a capacitor in parallel with R2 (in
the case of R
DS(ON)
sensing) or from ILIM to LX (in the
case of resistor sensing). For the case of R
DS(ON)
sens-
ing, the value of the capacitor should be:
C3 > 15 / (π x f
S
x R2)
For the case of resistor sensing:
C3 < 25 x 10
-9
/ R2
Selecting the Soft-Start Capacitor
An external capacitor from SS to GND is charged by an
internal 5µA current source, to the corresponding feed-
back threshold. Therefore, the soft-start time is calculat-
ed as:
t
SS
= C
SS
x V
FB
/ 5µA
For example, 0.033µF from SS to GND yields approxi-
mately a 3.96ms soft-start period.
In the tracking application (see Figure 3), the output
voltage is required to track REFIN during REFIN rise
and fall time. C
SS
must be chosen so that t
ss
is less
than REFIN rise and fall time.
Compensation Design
The MAX8597/MAX8598/MAX8599 use a voltage-mode
control scheme that regulates the output voltage by
comparing the error-amplifier output (COMP) with a
fixed internal ramp to produce the required duty cycle.
The error amplifier is an operational amplifier with
25MHz bandwidth to provide fast response. The output
lowpass LC filter creates a double pole at the resonant
frequency that introduces a gain drop of 40dB per
decade and a phase shift of 180 degrees per decade.
The error amplifier must compensate for this gain drop
and phase shift to achieve a stable high-bandwidth
closed-loop system. The Type III compensation
scheme (Figure 6) is used to achieve this stability.
The basic regulator loop can be thought of as consist-
ing of a power modulator and an error amplifier. The
power modulator has a DC gain set by V
IN
/ V
RAMP
,
with a double pole, f
P_LC
, and a single zero, f
Z_ESR
, set
by the output inductor (L), the output capacitor (C
O
),
and its equivalent series resistance (R
ESR
). Below are
the equations that define the power modulator:
where C
O
is the total output capacitance and R
ESR
is
the total ESR of the output capacitors.
G
V
V
where V V typ
f
LC
f
RC
MOD DC
IN
RAMP
RAMP
PLC
O
Z ESR
ESR O
()
_
_
, ( )
==
=
×
=
××
1
1
2
1
2
π
π
MAX8597/MAX8598/MAX8599
Low-Dropout, Wide-Input-Voltage,
Step-Down Controllers
______________________________________________________________________________________ 19
R2
C3
R
C
R
DS(ON)
DL
LX
DH
ILIM
R2
R
C
R
SENSE
DL
LX
DH
ILIM
C3
Figure 5. Adding RC for More Accurate Sensing
MAX8597/MAX8598/MAX8599
When the output capacitor is comprised of paralleling n
number of the same capacitors, then:
C
O
= n x C
EACH
and
R
ESR
= R
ESR_EACH
/ n
Thus, the resulting f
Z_ESR
is the same as that of a sin-
gle capacitor.
The total closed-loop gain must be equal to unity at the
crossover frequency, where the crossover frequency is
less than or equal to 1/5 the switching frequency (f
S
):
f
C
f
S
/ 5
So the loop-gain equation at the crossover frequency is:
G
EA(FC)
x G
MOD(FC)
= 1
where G
EA(FC)
is the error-amplifier gain at f
C
, and
G
MOD(FC)
is the power-modulator gain at f
C
.
The loop compensation is affected by the choice of out-
put filter capacitor due to the position of its ESR-zero
frequency with respect to the desired closed-loop
crossover frequency. Ceramic capacitors are used for
higher switching frequencies and have low capaci-
tance and low ESR; therefore, the ESR-zero frequency
is higher than the closed-loop crossover frequency.
Electrolytic capacitors (e.g., tantalum, solid polymer,
and OS-CON) are needed for lower switching frequen-
cies and have high capacitance (and some have high-
er ESR); therefore, the ESR-zero frequency can be
lower than the closed-loop crossover frequency. Thus,
the compensation design procedures are separated
into two cases:
Case 1: Crossover frequency is less than the out-
put-capacitor ESR-zero (f
C
< f
Z_ESR
).
The modulator gain at f
C
is:
G
MOD(FC)
= G
MOD(DC)
x (f
P_LC
/ f
C
)
2
Since the crossover frequency is lower than the output
capacitor ESR-zero frequency and higher than the LC
double-pole frequency, the error-amplifier gain must
have a +1 slope at f
C
so that, together with the -2 slope
of the LC double pole, the loop crosses over at the
desired -1 slope.
The error amplifier has a dominant pole at a very low
frequency (~0Hz), and two additional zeros and two
additional poles as indicated by the equations below
and illustrated in Figure 7:
f
Z1_EA
= 1 / (2 π x R4 x C2)
f
Z2_EA
= 1 / (2 π x (R1 + R3) x C1)
f
P2_EA
= 1 / (2 π x R3 x C1)
f
P3_EA
= 1 / (2 π x R4 x (C2 x C3 / (C2 + C3)))
Note that f
Z2_EA
and f
P2_EA
are chosen to have the
converter closed-loop crossover frequency, f
C
, occur
when the error-amplifier gain has +1 slope, between
f
Z2_EA
and f
P2_EA
. The error-amplifier gain at f
C
must
meet the requirement below:
G
EA(FC)
= 1 / G
MOD(FC)
The gain of the error amplifier between f
Z1_EA
and
f
Z2_EA
is:
G
EA(fZ1_EA - fZ2_EA)
= G
EA(FC)
x f
Z2_EA
/ f
C
= f
Z2_EA
/ (f
C
x G
MOD(FC)
)
This gain is set by the ratio of R4/R1 (Figure 6), where
R1 is calculated as illustrated in the Setting the Output
Voltage section. Thus:
R4 = R1 x f
Z2_EA
/ (f
C
x G
MOD(FC)
)
where f
Z2_EA
= f
P_LC
.
Due to the underdamped (Q > 1) nature of the output
LC double pole, the first error-amplifier zero frequency
must be set less than the LC double-pole frequency in
order to provide adequate phase boost. Set the error-
amplifier first zero, f
Z1_EA
, at 1/4 of the LC double-pole
frequency. Hence:
C2 = 2 / (π x R4 x f
P_LC
)
Set the error amplifier f
P2_EA
at f
Z_ESR
and
The error-amplifier gain between f
P2_EA
and f
P3_EA
is
set by the ratio of R4/RM and is equal to:
G
EA(fZ1_EA - fZ2_EA)
x (f
P2_EA
/ f
P_LC
)
where RM = R1 x R3 / (R1 + R3). Then:
RM = R4 x f
P_LC
/ (G
EA(fZ1_EA - fZ2_EA)
x f
P2_EA
)
= R4 x f
C
x G
MOD(FC)
/ f
P2_EA
The value of R3 can then be calculated as:
R3 = R1 x RM / (R1 – RM)
Now we can calculate the value of C1 as:
C1 = 1 / (2 π x R3 x f
p2_EA
)
and C3 as:
C3 = C2 / ((2 π x C2 x R4 x f
P3_EA
) - 1)
fat
f
if f is less than
f
If f is greater than
f
then set
fat
f
and f at f
pEA
s
Z ESR
s
Z ESR
s
pEA
s
p EA Z ESR
3
23
22
2
2
__
_
___
.
,
.
Low-Dropout, Wide-Input-Voltage,
Step-Down Controllers
20 ______________________________________________________________________________________
Case 2: Crossover frequency is greater than the
output-capacitor ESR zero (f
C
> f
Z_ESR
).
The modulator gain at f
C
is:
G
MOD(FC)
= G
MOD(DC)
x (f
P_LC
)
2
/ (f
Z_ESR
x f
C
)
Since the output-capacitor ESR-zero frequency is high-
er than the LC double-pole frequency but lower than
the closed-loop crossover frequency, where the modu-
lator already has -1 slope, the error-amplifier gain must
have zero slope at f
C
so the loop crosses over at the
desired -1 slope.
The error-amplifier circuit configuration is the same as
case 1 above; however, the closed-loop crossover fre-
quency is now between f
P2
and f
P3
as illustrated in
Figure 8.
The equations that define the error amplifier’s zeros
(f
Z1_EA
, f
Z2_EA
) and poles (f
P2_EA
, f
P3_EA
) are the
same as case 1; however, f
P2_EA
is now lower than the
closed-loop crossover frequency. Therefore, the error-
amplifier gain between f
Z1_EA
and f
Z2_EA
is now calcu-
lated as:
G
EA(f
Z1_EA
- f
Z2_EA
)
= G
EA(FC)
x f
Z2_EA
/ f
P2_EA
= f
Z2_EA
/ (f
P2_EA
x G
MOD(FC)
)
This gain is set by the ratio of R4/R1, where R1 is calcu-
lated as illustrated in the Setting the Output Voltage
section. Thus:
R4 = R1 x f
Z2_EA
/ (f
P2_EA
x G
MOD(FC)
)
where f
Z2_EA
= f
P_LC
and f
P2_EA
= f
Z_ESR
.
Similar to case 1, C2 is calculated as:
C2 = 2 / (π x R4 x f
P_LC
)
Set the error-amplifier third pole, f
P3_EA
, at half the
switching frequency, and let RM = (R1 x R3) / (R1 +
R3). The gain of the error amplifier between f
P2_EA
and
f
P3_EA
is set by the ratio of R4/RM and is equal to
G
EA(FC)
= 1 / G
MOD(FC)
. Then:
RM = R4 x G
MOD(FC)
Similar to case 1, R3, C1, and C3 are calculated as:
R3 = R1 x RM / (R1 - RM)
C1 = 1 / (2π x R3 x f
Z
_ESR)
C3 = C2 / ((2π x C2 x R4 x f
P3_EA
) - 1)
MAX8597/MAX8598/MAX8599
Low-Dropout, Wide-Input-Voltage,
Step-Down Controllers
______________________________________________________________________________________ 21
MAX8597
MAX8598
MAX8599
FB
COMP
C3
C2
R4
R2
R1
C1
R3
L
C
O
REF
Figure 6. Type III Compensation Network
GAIN
(dB)
FREQUENCY
0
f
Z1
f
Z2
f
P2
f
C
f
P3
EA GAIN
CLOSED-LOOP GAIN
Figure 7. Closed-Loop and Error-Amplifier Gain Plot for Case 1
GAIN
(dB)
FREQUENCY
0
f
Z1
f
Z2
f
P2
f
C
f
P3
EA GAIN
CLOSED-LOOP GAIN
Figure 8. Closed-Loop and Error-Amplifier Gain Plot for Case 2

MAX8598ETE+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Controllers Step-Down Controller
Lifecycle:
New from this manufacturer.
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