FAN5230
REV. 2.8.5 10/17/01
7
ADAPTIVE GATE
CONTROL
CLK
VFB
LSD
LSD
PWM
FAN5230
5V/3.3V Switcher
PGND
LSD
VCC
ISEN
PHASE
HSD
L1
VIN
5V
VFB
VOUT
CL
HYST
GATE
LOGIC
PWM
PWM/HYST
HI
LO
CPUMP
REF
OC DETECT
Q
SET
CLR
Q
D
VCC
CLK
L
PWM LATCH
VREF
RAMP
ERROR AMP
ISEN
MODE
CONTROL
DUTY
CYCLE
CLAMP
HYSTERIC
COMPARATOR
CURRENT SENSE
AMP
++
+
+
+
+
+
SUM
Figure 1. FAN5230 5V/3.3V Internal Block Diagram of PWM/PFM Loops.
FAN5230
8
REV. 2.8.5 10/17/01
Figure 2. FAN5230 12V Internal Block Diagram
Figure 3. FAN5230 5V/3.3V—ALWAYS Internal Block Diagram
16R
+
R
PWM
V
e
Ramp
S
R
Q
Q
CLK:3
DISABLE
VFB12
VREF=2.5V
+5
SW12
FAN5230
12V Converter
V
out
V
out
CLK:3
(30%DC, 100kHz)
CK:3
CK :3
V
e
Ramp
PWM
+
LDO
VIN
VFB5
5V ALWAYS
FAN5230
5V/3.3V-ALWAYS
LDO
3.3V ALWAYS
FAN5230
REV. 2.8.5 10/17/01
9
Functional Description
The FAN5230 is a high efficiency and high precision DC/DC
controller for notebook and other portable applications. It
provides all of the voltages necessary for system electronics:
5V, 3.3V, 12V, and both 3.3V-ALWAYS and 5V-ALWAYS.
Utilization of both input and output voltage feedback in a
current-mode control allows for fast loop response over a
wide range of input and output variations. Current sense
based on MOSFET R
DS,on
gives maximum efficiency, while
also permitting the use of a sense resistor for high accuracy.
3.3V and 5V Architecture
The 3.3V and 5V switching regulator outputs of the
FAN5230 are generated from the unregulated input voltage
using synchronous buck converters. Both high side and low-
side MOSFETs are N-channel.
The 3.3V and 5V switchers have pins for current sensing and
for setting of output over-current threshold using MOSFET
R
DS,on
. Each converter has a pin for voltage-sense feedback,
a pin that shuts down the converter, and a pin for generating
the boost voltage to drive the high-side MOSFET.
If the 5V switcher is not used, connect SDN5 (pin 17) to
SGND (pin 14). If the 3.3V switcher is not used, connect
SDN3.3 (pin 11) to SGND (pin 14).
The following discussion of the FAN5230 design will be
done with reference to Figures 1 through 4, showing the
internal block diagram of the IC.
3.3V and 5V PWM Current Sensing
Peak current sensing is done on the low side driver because
of the very low duty-cycle on the high side MOSFET. The
current is sampled 50ns after turn on and the value is held for
current feedback and over-current limit.
3.3V and 5V PWM Loop Compensation
The 3.3V and 5V control loops of the FAN5230 function as
voltage mode with current feedback for stability. They each
have an independent voltage feedback pin, as shown in Fig-
ure 1. They use voltage feed-forward to guarantee loop rejec-
tion of input voltage variation: that is to say that the PWM
(pulse width modulation) ramp amplitude is varied as a func-
tion of the input voltage. Compensation of the control loops
is done entirely internally using current-mode feedback com-
pensation. This scheme allows the bandwidth and phase mar-
gin to be almost independent of output capacitance and ESR.
3.3V and 5V PWM Current Limit
The 3.3V and 5V converters each sense the voltage across
their own low-side MOSFET to determine whether to enter
current limit. If an output current in excess of the current
limit threshold is measured then the converter enters a pulse
skipping mode where Iout is equal to the over-current (OC)
set limit. After 8 clock cycles then the regulator is latched off
(HSD and LSD off). This is the likely scenario in the case of
a "soft" short. If the short is "hard" it will instantly
trigger the under-voltage protection which again will latch
the regulator off (HSD and LSD off) after a 2µs delay.
Selection of a current-limit set resistor must include the
tolerance of the current-limit trip point, the MOSFET on
resistance and temperature coefficient, and the ripple current,
in addition to the maximum output current.
Example: Maximum DC output current on the 5V is 5A,
the MOSFET R
DS,on
is 17m, and the inductor is 5µH at a
current of 5A. Because of the low R
DS,on
, the low-side MOS-
FET will have a maximum temperature (ambient + self-heat-
ing) of only 75°C, at which its R
DS,on
increases to 20m.
Peak current is DC output current plus peak ripple current:
where T is the maximum period, V
O
is output voltage, and L
is the inductance. This current generates a voltage on the
low-side MOSFET of 7A • 20m = 140mV. The current
limit threshold is typically 150mV (worst-case 135mV) with
R2 = 1K, and so this value is suitable. R2 could be
increased a further 10% if additional noise margin is deemed
necessary.
Precision Current Limit
Precision current limiting can be achieved by placing a
discrete sense resistor between the source of the low-side
MOSFET and ground.
In this case, current limit accuracy is set by the tolerance of
the IC, +10%.
Figure 4. Using a Precision Current Sense Resistor
Shutdown (SDWN)
The SDWN pin turns off all 5 converters (+5V, +3.3V, and
+12V, 5V/3.3V-ALWAYS) and puts the FAN5230 into a low-
power mode (Shutdown mode).
I
pk
I
dc
+
TV
0
2L
= 5A +
4µsec • 5V
2 • 5µH
= 7A
HSD
SW
LSD
ISEN
GND

FAN5230QSCX

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC REG CONV MOBILE 5OUT 24QSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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